MC9S12ZVFP-Family
Reference Manual
HCS12
Microcontrollers
MC9S12ZVFPRMV1
Rev. 1.03
09/2014
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A full list of family members and options is included in the appendices.
The following revision history table summarizes changes contained in this document.
This document contains information for all constituent modules, with the exception of the S12Z CPU. For
S12ZCPU information please refer to the CPU S12Z Reference Manual.
Revision History
Revision
Date Description
Level
First release for external website
Sep, 2013 1.00 - Update LINPHY electrical spec
- Update OSC etc electrical spec
- Updated STOP mode BDC dependency text.
- Added STOP IDD parameter for T = 85C
A
- Changed V minimum from 2.97V to 2.95V
LVRXA
- Added frequency spec. for WSTAT to operating conditions table
Feb, 2014 1.01
- Removed incorrect device overview reference to LIN bus falling edge current limitation
- Removed incorrect device overview reference to over-temperature protection
- Corrected vector mapping of ADC CONIF_OIE interrupt
- Updated SCI/LINPHY/ADC/SPI/BDC/FTMRZ/CPMU sections (see section rev. history)
Jun, 2014 1.02 - Corrected ordering information controller family encoding in Appendix N
- Updated BKGD pin I/O specification
Sep, 2014 1.03
- Specified ADC accuracy for a range of VDDA and VREF
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