Single-Channel: 6N135M, 6N136M, HCPL4503M Dual-Channel: HCPL2530M, HCPL2531M High Speed Transistor Optocouplers January 2010 Single-Channel: 6N135M, 6N136M, HCPL4503M Dual-Channel: HCPL2530M, HCPL2531M (Preliminary) High Speed Transistor Optocouplers Features Description High speed 1 MBit/s The HCPL4503M, 6N135M, 6N136M, HCPL2530M and HCPL2531M optocouplers consist of an AlGaAs LED Superior CMR 10kV/s optically coupled to a high speed photodetector transis- Dual-Channel HCPL2530M, HCPL2531M tor. (Preliminary) A separate connection for the bias of the photodiode CTR guaranteed 070C improves the speed by several orders of magnitude over U.L. recognized (File E90700, Vol. 2) conventional phototransistor optocouplers by reducing VDE recognition (pending) the base-collector capacitance of the input transistor. Ordering option V, e.g., 6N135VM The HCPL4503M has no internal connection to the pho- 5,000Vrms (1 minute) isolation rating totransistor base for improved noise immunity. Superior CMR of 15,000V/s min. (HCPL4503M) An internal noise shield provides superior common No base connection for improved noise immunity mode rejection of up to 50,000V/s. (HCPL4503M) Related Resources Applications www.fairchildsemi.com/products/opto/ Line receivers www.fairchildsemi.com/pf/HC/HCPL0500.html Pulse transformer replacement www.fairchildsemi.com/pf/FO/FODM452.html Output interface to CMOS-LSTTL-TTL www.fairchildsemi.com/pf/FO/FOD050L.html Wide bandwidth analog coupling Schematics Package Outlines 8 V V + 1 8 1 8 N/C CC CC 1 V F1 V + V 2 7 2 7 01 B 8 V F 8 1 V 3 6 V 3 6 1 02 O V F2 N/C 4 5 GND + 4 5 GND 6N135M, 6N136M, HCPL4503M HCPL2530M/HCPL2531M Pin 7 is not connected in the HCPL4503M 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N13XM, HCPLXXXM Rev. 1.0.6Single-Channel: 6N135M, 6N136M, HCPL4503M Dual-Channel: HCPL2530M, HCPL2531M High Speed Transistor Optocouplers Absolute Maximum Ratings (T = 25C unless otherwise specied) A Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Condition Value Units T Storage Temperature -40 to +125 C STG T Operating Temperature -40 to +100 C OPR T Lead Solder Temperature 260 for 10 sec C SOL (Wave) EMITTER I (avg) DC/Average Forward Input 25 mA F (1) Current Each Channel I (pk) Peak Forward Input Current 50% duty cycle, 1ms P.W. 50 mA F (2) Each Channel I (trans) Peak Transient Input Current 1s P.W., 300pps 1.0 A F Each Channel V Reverse Input Voltage Each 5V R Channel P Input Power Dissipation Each 6N135M, 6N136M, HCPL4503M 45 mW D (3) Channel HCPL2530M, HCPL2531M DETECTOR I (avg) Average Output Current Each 8 mA O Channel I (pk) Peak Output Current Each 16 mA O Channel Emitter-Base Reverse Voltage 6N135M and 6N136M only 5 V V EBR V Supply Voltage -0.5 to 30 V CC V Output Voltage -0.5 to 20 V O Base Current 6N135M and 6N136M only 5 mA I B PD Output Power Dissipation 6N135M, 6N136M, HCPL4503M 100 mW (4) Each Channel HCPL2530M, HCPL2531M 35 mW Notes: 1. Derate linearly above 70C free-air temperature at a rate of 0.8mA/C. 2. Derate linearly above 70C free-air temperature at a rate of 1.6mA/C. 3. Derate linearly above 70C free-air temperature at a rate of 0.9 mW/C. 4. Derate linearly above 70C free-air temperature at a rate of 2.0 mW/C. 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N13XM, HCPLXXXM Rev. 1.0.6 2