DATA SHEET www.onsemi.com Hex Inverter SOIC14 NB 14 CASE 751A03 74AC04, 74ACT04 1 General Description SOIC14 14 The AC/ACT04 contains six inverters. CASE 751EF 1 Features I Reduced by 50% On 74AC Only CC TSSOP14 WB Outputs Source/Sink 24 mA 14 CASE 948G ACT04 has TTLCompatible Inputs 1 These are PbFree Devices TSSOP14 WB ABSOLUTE MAXIMUM RATINGS 14 CASE 948G01 Parameter Symbol Value Unit Supply Voltage V 0.5 to +7.0 V 1 CC DC Input Diode Current I mA IK V = 0.5 V 20 I MARKING DIAGRAM V = V + 0.5 V +20 I CC 14 DC Input Voltage V 0.5 to V I V + 0.5 CC AC(T)04 AWLYWW DC Output Diode Current I mA OK V = 0.5 V 20 O V = V + 0.5 V +20 1 O CC DC Output Voltage V 0.5 to V O V + 0.5 AC04, ACT04 = Specific Device Code CC A = Assembly Location DC Output Source or Sink Current I 50 mA O WL = Wafer Lot Y = Year DC V or Ground Current I or I 50 mA CC CC GND WW = Work Week per Output Pin Storage Temperature T 65 to +150 C STG Junction Temperature T 140 C MARKING DIAGRAM J PDIP 14 Stresses exceeding those listed in the Maximum Ratings table may damage the AC(T) device. If any of these limits are exceeded, device functionality should not be 04 assumed, damage may occur and reliability may be affected. ALYW 1 AC04, ACT04 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. Semiconductor Components Industries, LLC, 2005 1 Publication Order Number: December, 2021 Rev. 2 74ACT04/D74AC04, 74ACT04 ORDERING INFORMATION Order Number Package Number Package Description 74AC04SC M14A 14Lead Small Outline Integrated Circuit (SOIC), JEDEC MS012, 0.150 Narrow 74AC04MTC MTC14 14Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO153, 4.4 mm Wide 74ACT04SC M14A 14Lead Small Outline Integrated Circuit (SOIC), JEDEC MS012, 0.150 Narrow 74ACT04MTC MTC14 14Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO153, 4.4 mm Wide NOTES: Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering code. All packages are lead free per JEDEC: JSTD020B standard. IEEE/IEC Figure 2. Logic Symbol Figure 1. Connection Diagram PIN DESCRIPTION Pin Description A Inputs n O Outputs n RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V Supply Voltage V CC AC 2.0 6.0 ACT 4.5 5.5 V Input Voltage 0 V V I CC V Output Voltage 0 V V O CC T Operating Temperature 40 +85 C A V / t Minimum Input Edge Rate, AC Devices: 125 mV/ns V from 30% to 70% of V ,V at 3.3 V, 4.5 V, 5.5 V IN CC CC Minimum Input Edge Rate, ACT Devices: 125 mV/ns V / t V from 0.8 V to 2.0 V, V at 4.5 V, 5.5 V IN CC Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2