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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.74LVX32 Low Voltage Quad 2-Input OR Gate
February 2008
74LVX32
Low Voltage Quad 2-Input OR Gate
Features General Description
Input voltage level translation from 5V to 3V The LVX32 contains four 2-input OR gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V
Ideal for low power/low noise 3.3V applications
systems to 3V systems.
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Information
Order Package
Number Number Package Description
74LVX32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram Logic Symbol
IEEE/IEC
Pin Description
Pin Names Description
A , B Inputs
n n
O Outputs
n
1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LVX32 Rev. 1.4.0