74VHC02 Quad 2-Input NOR Gate 74VHC02 Quad 2-Input NOR Gate General Description The VHC02 is an advanced high-speed CMOS 2-Input Features NOR Gate fabricated with silicon gate CMOS technol- High Speed: t = 3.6ns (Typ.) at V = 5V PD CC ogy. It achieves the high-speed operation similar to Low power dissipation: I = 2A (Max.) at T = 25C equivalent Bipolar Schottky TTL while maintaining the CC A CMOS low power dissipation. The internal circuit is High noise immunity: V = V = 28% V (Min.) NIH NIL CC composed of 3 stages, including buffer output, which Power down protection is provided on all inputs provide high noise immunity and stable output. An input Low noise: V = 0.8V (Max.) OLP protection circuit insures that 0V to 7V can be applied to Pin and function compatible with 74HC02 the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Package Order Number Package Description Number M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 74VHC02M Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC02SJ M14D 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 74VHC02MTC MTC14 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1992 Semiconductor Components Industries, LLC. Publication Order Number: August-2017, Rev. 2 74VHC02/D74VHC02 Quad 2-Input NOR Gate Connection Diagram Logic Symbol IEEE/IEC Pin Description Truth Table Pin Names Description AB O A , B Inputs n n LL H O Outputs n LHL HL L HH L www.onsemi.com 2