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This literature is subject to all applicable copyright laws and is not for resale in any manner.74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs April 2007 74VHC374 tm Octal D-Type Flip-Flop with 3-STATE Outputs Features General Description High Speed: t = 5.4ns (typ) at V = 5V The VHC374 is an advanced high speed CMOS octal PD CC flip-flop with 3-STATE output fabricated with silicon gate High noise immunity: V = V = 28% V (Min.) NIH NIL CC CMOS technology. It achieves the high speed operation Power down protection is provided on all inputs similar to equivalent Bipolar Schottky TTL while main- Low power dissipation: I = 4A (Max) T = 25C CC A taining the CMOS low power dissipation. This 8-bit Pin and function compatible with 74HC374 D-type flip-flop is controlled by a clock input (CP) and an output enable input (OE ). When the OE input is HIGH, the eight outputs are in a HIGH impedance state. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mis- matched supply and input voltages. Ordering Information Order Package Number Number Package Description 74VHC374M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74VHC374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Descriptions Pin Names Description D D Data Inputs 0 7 CP Clock Pulse Input 3-STATE Output Enable Input OE O 3-STATE Outputs O 0 7 1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3