CAT24C208 2 EEPROM Serial 8-Kb I C Dual Port Description 2 The CAT24C208 is an EEPROM Serial 8Kb I C Dual Port internally organized as 4 segments of 256 bytes each. The www.onsemi.com CAT24C208 features a 16byte page write buffer and can be accessed 2 from either of two separate I C compatible ports, DSP (SDA, SCL) and DDC (SDA, SCL). Arbitration between the two interface ports is automatic and allows the appearance of individual access to the memory from each SOIC8 W SUFFIX interface. CASE 751BD Features 2 Supports Standard and Fast I C Protocol PIN CONFIGURATION 2.5 V to 5.5 V Operation 1 DSP V DDC V CC CC 16Byte Page Write Buffer 2 DSP SCL EDID SEL Schmitt Triggers and Noise Protection Filters on I C Bus Input Low Power CMOS Technology DSP SDA DDC SCL 1,000,000 Program/Erase Cycles V DDC SDA SS 100 Year Data Retention SOIC (W) (Top View) Industrial Temperature Range SOIC 8lead Package This Device is PbFree, Halogen Free/BFR Free, and RoHS ORDERING INFORMATION See detailed ordering and shipping information in the package Compliant dimensions section on page 8 of this data sheet. DSP V CC DDC V CC ARBITRATION LOGIC D D E E C C 1K X 8 DISPLAY DDC O O DSP SCL DDC SCL MEMORY D D CONTROL CONTROL ARRAY E E DSP SDA DDC SDA LOGIC LOGIC R R S S CONFIGURATION EDID SEL V REGISTER SS Figure 1. Block Diagram Semiconductor Components Industries, LLC, 2009 1 Publication Order Number: May, 2018 Rev. 7 CAT24C208/DCAT24C208 Table 1. PIN DESCRIPTION Pin Number Pin Name Function 1 DSP V Device power from display controller CC 2 DSP SCL The CAT24C208 DSP serial clock bidirectional pin is used to clock all data transfers into or out of the device DSP SDA pin and is also used to block DSP Port access when DDC Port is active. 3 DSP SDA DSP Serial Data/Address. The bidirectional DSP serial data/address pin is used to transfer data into and out of the device from a display controller. The DSP SDA pin is an open drain output and can be wireORed with other open drain or open collector outputs. 4 V Device ground. SS 5 DDC SDA DDC Serial Data/Address. The bidirectional DDC serial data/address pin is used to transfer data into and out of the device from a DDC host. The DDC SDA pin is an open drain output and can be wire ORed with other open drain or open collector outputs. 6 DDC SCL The CAT24C208 DDC serial clock bidirectional pin is used to clock all data transfers into or out of the device DDC SDA pin, and is used to block DDC Port for access when DSP Port is active. 7 EDID SEL EDID select. The CAT24C208 EDID select input selects the active bank of memory to be accessed via the DDC SDA/SCL interface as set in the configuration register. 8 DDC V Device power when powered from a DDC host. CC Table 2. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Units Temperature Under Bias 55 to +125 C Storage Temperature 65 to +150 C Voltage on Any Pin with Respect to Ground (Note 1) 2.0 to +V +2.0 V CC V with Respect to Ground 2.0 to +7.0 V CC Package Power Dissipation Capability (T = 25C) 1.0 W A Lead Soldering Temperature (10 secs) 300 C Output Short Circuit Current (Note 2) 100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The minimum DC input voltage is 0.5 V. During transitions, inputs may undershoot to 2.0 V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC + 0.5 V, which may overshoot to VCC + 2.0 V for periods of less than 20 ns. 2. Output shorted for no more than one second. No more than one output shorted at a time. Table 3. RELIABILITY CHARACTERISTICS Symbol Parameter Reference Test Method Min Units N (Note 3) Endurance MILSTD883, Test Method 1033 1,000,000 Cycles/Byte END T (Note 3) Data Retention MILSTD883, Test Method 1008 100 Years DR V (Note 3) ESD Susceptibility JEDEC Standard JESD 22 2000 Volts ZAP I (Notes 3 and 4) Latchup JEDEC Standard 17 100 mA LTH 3. This parameter is tested initially and after a design or process change that affects the parameter. 4. Latchup protection is provided for stresses up to 100 mA on address and data pins from 1 V to V +1 V. CC Table 4. CAPACITANCE (T = 25C, f = 1.0 MHz, V = 5 V) A CC Symbol Parameter Conditions Min Typ Max Units C (Note 5) Input/Output Capacitance (Either DSP or DDC SDA) V = 0 V 8 pF I/O I/O C (Note 5) Input Capacitance (EDID, Either DSP or DDC SCL) V = 0 V 6 pF IN IN 5. This parameter is tested initially and after a design or process change that affects the parameter. www.onsemi.com 2