Dual 2-A High-Speed, Low-Side Gate Drivers FAN3216 / FAN3217 The FAN3216 and FAN3217 dual 2 A gate drivers are designed to drive N channel enhancement mode MOSFETs in low side switching applications by providing high peak current pulses during www.onsemi.com the short sw itching intervals. They are both available with TTL input thresholds. Internal circuitry provides an undervoltage lockout function by holding the output LOW until the supply voltage is within the operating range. In addition, the drivers feature matched internal 8 propagation delays between A and B channels for applications 1 requiring dual gate drives with critical timing, such as synchronous SOIC8 rectifiers. This also enables connecting two drivers in parallel to CASE 751EB effectively double the current capability driving a single MOSFET. The FAN3216/17 drivers incorporate MillerDrive architecture for the final output stage. This bipolarMOSFET combination provides PACKAGE OUTLINE high current during the Miller plateau stage of the MOSFET turnon / turn off process to minimize switching loss, while providing 1 8 railtorail voltage swing and reverse current capability. The FAN3216 offers two inverting drivers and the FAN3217 offers 2 7 two noninverting drivers. Both are offered in a standard 8pin SOIC 3 6 package. 4 5 Features IndustryStandard Pinouts Figure 1. SOIC8 (Top View) 4.5 V to 18 V Operating Range 3 A Peak Sink/Source at V = 12 V DD 2.4 A Sink / 1.6 A Source at V = 6 V OUT MARKING DIAGRAM Inverting Configuration (FAN3216) and Non Inverting 8 Configuration (FAN3217) XXXXX Internal Resistors Turn Driver Off If No Inputs AYWW 12 ns / 9 ns Typical Rise/Fall Times (1 nF Load) 20 ns Typical Propagation Delay Matched within 1 ns to the Other 1 Channel SOIC8 TTL Input Thresholds A = Assembly Lot Code MillerDrive Technology L = Wafer Lot Double Current Capability by Paralleling Channels Y = Year W = Work Week Standard SOIC8 Package = PbFree Package Rated from 40C to +125C Ambient (Note: Microdot may be in either location) Automotive Qualified to AEC-Q100 *This information is generic. Please refer to device These are PbFree Devices data sheet for actual part marking. PbFree indicator, G or microdot , may or may not be present. Applications SwitchMode Power Supplies High-Efficiency MOSFET Switching ORDERING INFORMATION See detailed ordering and shipping information on page 15 of Synchronous Rectifier Circuits this data sheet. DC-to-DC Converters Motor Control Automotive Qualified Systems Semiconductor Components Industries, LLC, 2019 1 Publication Order Number: August, 2020 Rev. 0 FAN3217F085/DFAN3216 / FAN3217 PIN CONFIGURATIONS NC 1 8 NC 1 8 NC NC INA 2 A 7 OUTA INA 2 A 7 OUTA GND 3 6 VDD GND 3 6 VDD INB 4 5 OUTB B INB 4 B 5 OUTB Figure 2. FAN3216 Pin Configuration Figure 3. FAN3217 Pin Configuration THERMAL CHARACTERISTICS (Note 1) JL JT JA JB JT Package (Note 2) (Note 3) (Note 4) (Note 5) (Note 6) Unit 8Pin Small Outline Integrated Circuit (SOIC) 40 31 89 43 3.0 C/W 1. Estimates derived from thermal simulation actual values depend on the application. 2. Theta JL ( ): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any thermal pad) JL that are typically soldered to a PCB. 3. Theta JT ( ): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is held at a uniform JT temperature by a top side heatsink. 4. Theta JA ( ): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow. The value given JA is for natural convection with no heatsink using a 2S2P board, as specified in JEDEC standards JESD512, JESD515, and JESD517, as appropriate. 5. Psi JB ( ): Thermal characterization parameter providing correlation between semiconductor junction temperature and an application JB circuit board reference point for the thermal environment defined in Note 4. For the SOIC8 package, the board reference is defined as the PCB copper adjacent to pin 6. 6. Psi JT ( ): Thermal characterization parameter providing correlation between the semiconductor junction temperature and the center of JT the top of the package for the thermal environment defined in Note 4. PIN DEFINITIONS Pin Name Pin Description 1 NC No Connect. This pin can be grounded or left floating. 2 INA Input to Channel A. 3 GND Ground. Common ground reference for input and output circuits. 4 INB Input to Channel B. 5 (FAN3216) OUTB Gate Drive Output B (inverted from the input): Held LOW unless required input is present and V is DD above UVLO threshold. 5 (FAN3217) OUTB Gate Drive Output B: Held LOW unless required input(s) are present and V is above UVLO threshold. DD 6 VDD Supply Voltage. Provides power to the IC. 7 (FAN3216) OUTA Gate Drive Output A (inverted from the input): Held LOW unless required input is present and V is DD above UVLO threshold. 7 (FAN3217) OUTA Gate Drive Output A: Held LOW unless required input(s) are present and V is above UVLO threshold. DD 8 NC No Connect. This pin can be grounded or left floating. OUTPUT LOGIC FAN3216 (x = A or B) FAN3217 (x = A or B) INx OUTx INx OUTx 0 1 0 (Note 7) 0 1 (Note 7) 0 1 1 7. Default input signal if no external connection is made. www.onsemi.com 2