FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller October 2008 FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller Features Description The highly integrated FAN6300 PWM controller High-Voltage Startup provides several features to enhance the performance Quasi-Resonant Operation of flyback converters. A built-in HV startup circuit can provide more startup current to reduce the startup time Cycle-by-Cycle Current Limiting of the controller. Once the V voltage exceeds the DD Peak-Current-Mode Control turn-on threshold voltage, the HV startup function is disabled immediately to improve power consumption. Leading-Edge Blanking An internal valley voltage detector ensures the power Internal Minimum t OFF system operates at Quasi-Resonant operation in wide- range line voltage and any load conditions and reduces Internal 2ms Soft-Start switching loss to minimize switching voltage on drain of Over-Power Compensation power MOSFET. GATE Output Maximum Voltage To minimize standby power consumption and light-load efficiency, a proprietary green-mode function provides Auto-Recovery Short-Circuit Protection (FB Pin) off-time modulation to decrease switching frequency Auto-Recovery Open-Loop Protection (FB Pin) and perform extended valley voltage switching to keep to a minimum switching voltage. VDD Pin & Output Voltage (DET Pin) OVP Latched FAN6300 controller also provides many protection functions. Pulse-by-pulse current limiting ensures the Applications fixed peak current limit level, even when a short circuit occurs. Once an open-circuit failure occurs in the AC/DC NB Adapters feedback loop, the internal protection circuit disables PWM output immediately. As long as V drops below Open-Frame SMPS DD the turn-off threshold voltage, controller also disables PWM output. The gate output is clamped at 18V to protect the power MOS from high gate-source voltage conditions. The minimum t time limit prevents the OFF system frequency from being too high. If the DET pin reaches OVP, internal OTP is triggered, and the power system enters latch-mode until AC power is removed. FAN6300 controller is available in 8-pin SOP and DIP packages. Ordering Information Operating Part Number Package Packing Method Eco Status Temperature Range 8-Lead, Small Out-line Package FAN6300SY -40 to +105C Green Tape & Reel (SOP) 8-Lead, Dual In-line Package FAN6300DY -40 to +105C Green Tube (DIP) For Fairchilds definition of green Eco Status, please visit: FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller Application Diagram Figure 1. Typical Application Internal Block Diagram HV VDD 8 6 Internal Bias OVP I HV Two Steps 4.2V UVLO 27V 16V/10V/8V 2R Latched Soft-Start 2 FB 2ms R FB OLP Timer 55ms 500s 30s Starter DRV Blanking Circuit SET S Q 5 3 GATE CS PWM 18V Over-Power Current Limit R CLR Q Compensation IDET Latched 0.3V tOFF-MIN Valley (8s/38s) Detector t OFF-MIN V DET 1st +9s Valley V tOFF DET S/H Blanking Latched (4s) 2.5V DET OVP DET 1 Internal 0.3V Latched OTP I 5V DET 4 7 GND NC Figure 2. Functional Block Diagram 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300 Rev. 1.0.3 2