DATA SHEET www.onsemi.com Logic Gate Optocoupler, High CMR, Bi-Directional FOD8012A Description SOIC8 CASE 751DZ The FOD8012A is a half duplex, bidirectional, highspeed logic gate Optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes onsemis patented MARKING DIAGRAM coplanar packaging technology, OPTOPLANAR , and optimized IC 1 design to achieve minimum 20 kV/ s Common Mode Noise Rejection (CMR) rating. ON 2 8012A This highspeed logic gate optocoupler is highly integrated with 2 optically coupled channels arranged in bidirectional configuration, 5 X YY S1 and housed in a compact 8pin small outline package. Each optocoupler channel consists of a highspeed AlGaAs LED driven by a CMOS buffer IC coupled to a CMOS detector IC. The detector IC comprises of an integrated photodiode, a highspeed transimpedance 4 3 amplifier and a voltage comparator with an output driver. The CMOS 1. ON = onsemi Logo technology coupled to the high efficiency of the LED achieves low 2. 8012A= Device Number power consumption as well as very high speed (60 ns propagation 3. X = OneDigit Year Code, e.g. 8 delay, 15 ns pulse width distortion). 4. YY = Two Digit Work Week Ranging from 01 to 53 Features 5. S1 = Assembly Package Code Half Duplex, BiDirectional 20 kV/ s Minimum Common Mode Rejection High Speed: ORDERING INFORMATION 15 Mbit/s Date Rate (NRZ) See detailed ordering and shipping information on page 9 of this data sheet. 60 ns Maximum Propagation Delay 15 ns Maximum Pulse Width Distortion 30 ns Maximum Propagation Delay Skew 3.3 V and 5 V CMOS Compatibility Extended Industrial Temperate Range, 40 to +110C Temperature Range Safety and Regulatory Approvals: UL1577, 3750 VAC for 1 min. RMS DIN EN/IEC6074755 (approval pending) Applications Industrial Fieldbus Communications DeviceNet, CAN, RS485 Microprocessor System Interface 2 SPI, I C Programmable Logic Control Isolated Data Acquisition System Voltage Level Translator Related Resources FOD8001/D, High Noise Immunity, 3.3 V/5 V Logic Gate Optocoupler Datasheet Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: January, 2022 Rev. 2 FOD8012A/DFOD8012A TRUTH TABLE V LED V IN O High OFF High Low ON Low NOTE: When not communicating, V must be in static high logic condition. IN Functional Schematic V 1 8 V DD1 DD2 V 2 7 V OA INA V V 3 6 INB OB GND GND 4 5 1 2 0.1F bypass capacitor required from V to GND DD Figure 1. Functional Schematic PIN DEFINITIONS Pin Number Pin Name Description 1 V Supply Voltage to ChannelA detector IC and ChannelB buffer IC DD1 2 V Output Voltage from ChannelA detector IC OA 3 V Input Voltage to ChannelB buffer IC INB 4 GND Ground for ChannelA detector IC and ChannelB buffer IC 1 5 GND Ground for ChannelA buffer IC and ChannelB detector IC 2 6 V Output Voltage from ChannelB detector IC OB 7 Input Voltage to ChannelA buffer IC V INA 8 V Supply Voltage to ChannelA buffer IC and ChannelB detector IC DD2 www.onsemi.com 2