8-Pin DIP High-Speed 10 MBit/s Logic Gate Optocouplers Single-Channel: 6N137M, HCPL2601M, HCPL2611M www.onsemi.com Dual-Channel: HCPL2630M, HCPL2631M PDIP8 6.6x3.81, 2.54P Description CASE 646BW 8 The 6N137M, HCPL2601M, HCPL2611M singlechannel and HCPL2630M, HCPL2631M dual channel optocouplers consist of a 1 850 nm AlGaAs LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR PDIP8 9.655x6.6, 2.54P outputs. The switching parameters are guaranteed over the CASE 646CQ 8 temperature range of 40C to +85C. A maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out 1 of 8). An internal noise shield provides superior common mode rejection PDIP8 GW of typically 10 kV/ s. The HCPL2601M and HCPL2631M has a CASE 709AC 8 minimum CMR of 5 kV/ s. The HCPL2611M has a minimum CMR of 10 kV/ s. 1 Features PDIP8 GW Very High Speed 10 MBit/s 8 CASE 709AD Superior CMR 10 kV/ s 1 Fanout of 8 Over 40C to +85C Logic Gate Output MARKING DIAGRAM Strobable Output Wired ORopen Collector ON Safety and Regulatory Approvals 6N137 UL1577, 5,000 VAC for 1 Minute RMS VXXYYB DIN EN/IEC6074755 These are PbFree Devices 6N137 = Device Number V = DIN EN/IEC6074755 Option (only Applications appears on component ordered with this option) Ground Loop Elimination XX = TwoDigit Year Code, e.g., 16 LSTTL to TTL, LSTTL or 5 V CMOS YY = TwoDigit Work Week, Ranging from 01 to 53 Line Receiver, Data Transmission B = Assembly Package Code Data Multiplexing Switching Power Supplies ORDERING INFORMATION Pulse Transformer Replacement See detailed ordering and shipping information on page 14 of this data sheet. Computerperipheral Interface Semiconductor Components Industries, LLC, 2009 1 Publication Order Number: June, 2021 Rev. 2 HCPL2631M/DSingleChannel: 6N137M, HCPL2601M, HCPL2611M Dual Channel: HCPL2630M, HCPL2631M SCHEMATICS V N/C 1 8 + 1 8 V CC CC V F1 V + 2 7 2 7 V E 01 V F V 3 6 3 6 V O 02 V F2 + N/C 4 5 GND 4 5 GND 6N137M, HCPL2601M, HCPL2630M, HCPL2611M HCPL2631M A 0.1 F bypass capacitor must be connected between pins 8 and 5 (Note 1). Figure 1. Schematics TRUTH TABLE (Positive Logic) Input Enable Output H H L L H H H L H L L H H NC L L NC H www.onsemi.com 2