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Based on the TRUESENSE 5.5 micron Interline Transfer CCD Platform, the sensor features broad dynamic range, www.onsemi.com excellent imaging performance, and a flexible readout architecture that enables use of 1, 2, or 4 outputs for full resolution readout up to 68 frames per second. A vertical overflow drain structure suppresses image blooming and enables electronic shuttering for precise exposure control. Other features include low dark current, negligible lag, and low smear. The sensor shares common PGA pin-out and electrical configurations with other devices based on the TRUESENSE 5.5 micron Interline Transfer CCD Platform, allowing a single camera design to support multiple members of this sensor family. Table 1. GENERAL SPECIFICATIONS Parameter Typical Value Figure 1. KAI02050 Interline CCD Architecture Interline CCD, Progressive Scan Image Sensor Total Number of Pixels 1684 (H) 1264 (V) Number of Effective Pixels 1640 (H) 1240 (V) Features Number of Active Pixels 1600 (H) 1200 (V) Pixel Size 5.5 m (H) 5.5 m (V) Color or Monochrome Configurations Active Image Size 8.8 mm (H) 6.6 mm (V) Progressive Scan Readout 11.0 mm (diagonal), 2/3 Optical Format Flexible Readout Architecture Aspect Ratio 4:3 High Frame Rate Number of Outputs 1, 2, or 4 High Sensitivity Charge Capacity 20,000 electrons Low Noise Architecture Output Sensitivity 34 V/e Excellent Smear Performance Quantum Efficiency Package Pin Reserved for Device Mono (ABA) 44% R, G, B (FBA) 29%, 37%, 39% Identification R, G, B (CBA) 31%, 37%, 38% Read Noise (f = 40 MHz) 12 e rms Applications Dark Current Industrial Imaging Photodiode / VCCD 7 / 100 e /s Medical Imaging Dark Current Doubling Temp Photodiode / VCCD 7C / 9C Security Dynamic Range 64 dB Charge Transfer Efficiency 0.999999 ORDERING INFORMATION See detailed ordering and shipping information on page 2 of Blooming Suppression > 300 X this data sheet. Smear 100 dB Image Lag < 10 electrons Maximum Pixel Clock Speed 40 MHz Maximum Frame Rates Quad / Dual / Single Output 68 / 34 / 18 fps Package 68 Pin PGA 64 Pin CLCC Cover Glass AR Coated, 2-Sides or Clear Glass NOTE: All Parameters are specified at T = 40C unless otherwise noted. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: August, 2015 Rev. 8 KAI02050/D