LC717A10AJ CapacitanceDigitalConverter LSI for Electrostatic Capacitive Touch Sensors Overview www.onsemi.com The LC717A10AJ is a high-performance and low-cost capacitance-digital-converter LSI for electrostatic capacitive touch sensor, especially focused on usability. It has 16 channels capacitance-sensor input. This makes it ideal for use in the products that need many switches. Since the calibration function and the judgment of ON/OFF are automatically performed in LSI internal, it can make development time more short. A detection result (ON/OFF) for each input can be read out by the serial interface 2 (I C compatible bus or SPI). Also, measurement value of each input can be read out as 8-bit SSOP30 (225 mil) CASE 565AZ digital data. Moreover, gain and other parameters can be adjusted using serial interface. MARKING DIAGRAM Features Detection System: Differential Capacitance Detection XXXXXXXXXX (Mutual Capacitance Type) YMDDD Input Capacitance Resolution: Can Detect Capacitance Changes in the Femto Farad Order Measurement Interval (16 Differential Inputs): XXXXX = Specific Device Code 30 ms (Typ) (at Initial Configuration) Y = Year 6 ms (Typ) (at Minimum Interval Configuration) M = Month External Components for Measurement: Not Required DDD = Additional Traceability Data Current Consumption: 570 A (Typ) (V = 2.8 V) DD ORDERING INFORMATION 1.3 mA (Typ) (V = 5.5 V) See detailed ordering and shipping information on page 11 of DD this data sheet. Supply Voltage: 2.6 V to 5.5 V Detection Operations: Switch 2 Interface: I C Compatible Bus or SPI Selectable Semiconductor Components Industries, LLC, 2013 1 Publication Order Number: August, 2018 Rev. 3 LC717A10AJ/DLC717A10AJ Specifications Table 1. ABSOLUTE MAXIMUM RATINGS (T = 25C, V = 0 V) A SS Parameter Symbol Ratings Unit Remarks Supply Voltage V 0.3 to +6.5 V DD Input Voltage V 0.3 to V + 0.3 V (Note 1) IN DD Output Voltage V 0.3 to V + 0.3 V (Note 2) OUT DD Power Dissipation P 160 mW T = +105 C, Mounted on a substrate (Note 3) d max A Storage Temperature T 55 to +125 C stg Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Apply to Cin0 to 15, Cref, CrefAdd, nRST, SCL, SDA, SA0, SA1, SCK, SI, nCS. 2. Apply to Cdrv, SDA, SO, INTOUT. 3. Single-layer glass epoxy board (76.1 114.3 1.6t mm). Table 2. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Conditions Min Typ Max Unit Remarks Operating Supply Voltage V 2.6 5.5 V DD Supply Ripple + Noise V 20 mV (Note 4) PP Operating Temperature T 40 25 105 C opr Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 4. Inserting a high-valued capacitor and a low-valued capacitor in parallel between V and V is recommended. In this case, the small-valued DD SS capacitor should be at least 0.1 F, and is mounted near the LSI. Table 3. ELECTRICAL CHARACTERISTICS (V = 0 V, V = 2.6 to 5.5 V, T = 40 to +105C, Unless otherwise specified, the Cdrv drive frequency is f = 143 kHz. SS DD A CDRV Not tested at low temperature before shipment.) Parameter Symbol Conditions Min Typ Max Unit Remarks Capacitance Detection Resolution N 8 bit Output Noise RMS N Minimum gain setting 1.0 LSB (Notes 5, 7) RMS Input Offset Capacitance Coff 8.0 pF (Notes 5, 7) RANGE Adjustment Range Input Offset Capacitance Coff 8 bit RESO Adjustment Resolution Cin Offset Drift Cin Minimum gain setting 8 LSB (Note 5) DRIFT Cin Detection Sensitivity Cin Minimum gain setting 0.04 0.12 LSB/fF (Note 6) SENSE Cin Pin Leak Current I Cin = HiZ 25 500 nA Cin Cin Allowable Parasitic Input Cin Cin against V 30 pF (Notes 5, 7) SUB SS Capacitance Cdrv Drive Frequency f 100 143 186 kHz CDRV Cdrv Pin Leak Current I Cdrv = HiZ 25 500 nA CDRV nRST Minimum Pulse Width t 1 s NRST Power-on Reset Time t 20 ms POR Power-on Reset Operation t 10 ms (Note 5) POROP Condition: Hold Time Power-on Reset Operation V 0.1 V (Note 5) POROP Condition: Input Voltage Power-on Reset Operation t 0 V to V 1 V/ms (Note 5) VDD DD Condition: Power Supply Rise Rate www.onsemi.com 2