LC75890W 1/4-Duty and Static Drive General-Purpose LCD Driver Overview The LC75890W is the 1/4 duty and static drive general-purpose LCD www.onsemi.com display driver that can be used for displaying segments for household appliances, home audio visual products, portable devices and other such products under the control of a microcontroller.The LC75890W can drive up to 148 segments directly. In addition the LC75890W can control up to 12 general-purpose output ports. They can control the brightness of the LED backlight of RGB, because they have the PWM output of greatest 3CH built-in. Incorporation of the oscillation circuit helps to reduce the number of external resistors and capacitors required. Incorporation of the LCD drive bias voltage stabilization circuit helps to reduce the capacitors for the LCD drive bias voltage stabilization. SPQFP48 7x7 / SQFP48 Features Support for 1/4-duty 1/3-bias or static drive techniques under serial data control. When 1/4-duty drive : Capable of driving up to 148 segments When Static drive : Capable of driving up to 37 segments Support for display segment on, off, or blinking for each segment output pin under serial data control. Serial data control of the power-saving mode based backup function and the all segments forced off function. Serial data control of switching between the segment output port and general-purpose output port function. Support for up to 12 general-purpose output ports Support for the PWM output function of a maximum of 3 ch. (It can output from the general-purpose output port ). Serial data control of the frame frequency of the common and segment output waveforms. Serial data control of the segment blinking frequency. Serial data control of switching between the internal oscillator operating mode and external clock operating mode. Serial data input supports CCB* format communication with the system controller. Independent V for the LCD driver block. LCD Built-in LCD drive bias voltage stabilization circuit. The INH pin allows the display to be forced to the off state. Incorporation of an oscillator circuit. (Incorporation of resistor and capacitor for an oscillation) * Computer Control Bus (CCB) is an ON Semiconductors original bus format and the bus addresses are controlled by ON Semiconductor. ORDERING INFORMATION See detailed ordering and shipping information on page 29 of this data sheet. Semiconductor Components Industries, LLC, 2017 1 Publication Order Number : July 2017 - Rev. 2 LC75890W/D LC75890W Specifications Absolute Maximum Ratings at Ta = 25 C, V = 0 V SS Parameter Symbol Conditions Ratings Unit Maximum supply voltage V max V 0.3 to +4.2 DD DD V V max V 0.3 to +6.5 LCD LCD Input voltage V 1 CE, CL, DI, 0.3 to +4.2 INH IN V V 2 OSCI : External clock operating mode 0.3 to V +0.3 IN DD Output voltage V S1 to S37, COM1 to COM4, P1 to P12 0.3 to V +0.3 V OUT LCD Output current I 1 S1 to S36 300 A OUT I 2 COM1 to COM4, S37 3 OUT mA I 3 P1 to P12 *1 5 OUT Allowable power dissipation Pd max Ta = 85 C 100 mW Operating temperature Topr 40 to +85 C Storage temperature Tstg 55 to +125 C Note : *1 The sum of output current through P1 to P12 must be 40 mA or less. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Allowable Operating Ranges at Ta = 40 to +85C, V = 0 V SS Ratings Parameter Symbol Conditions Unit min typ max Supply voltage V V 2.7 3.6 DD DD V V : Internal oscillator operating mode 2.7 5.5 V LCD LCD V : External clock operating mode V 5.5 LCD DD Input high-level voltage V 1 CE, CL, DI, 0.7V 3.6 INH IH DD V V 2 OSCI: External clock operating mode 0.7V V IH DD DD Input low-level voltage V 1 CE, CL, DI, 0 0.2V INH IL DD V V 2 OSCI: External clock operating mode 0 0.2V IL DD External clock operating f OSCI: External clock operating mode 10 38 600 kHz CK frequency Figure 3 External clock duty cycle D OSCI: External clock operating mode 30 50 70 % CK Figure 3 Data setup time tds CL, DI Figure 1 , Figure 2 160 ns Data hold time tdh CL, DI Figure 1 , Figure 2 160 ns CE wait time tcp CE, CL Figure 1 , Figure 2 160 ns CE setup time tcs CE, CL Figure 1 , Figure 2 160 ns CE hold time tch CE, CL Figure 1 , Figure 2 160 ns High-level clock pulse width t H CL Figure 1 , Figure 2 160 ns Low-level clock pulse width t L CL Figure 1 , Figure 2 160 ns Rise time tr CE, CL, DI Figure 1 , Figure 2 160 ns Fall time tf CE, CL, DI Figure 1 , Figure 2 160 ns switching time tc Figure 4 , Figure 5 10 s INH INH Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2