OrdeOrdering numbering numberr : ENA1951 : ENA1951 LC88F58B0A CMOS IC FROM 128K byte, RAM 6K byte on-chip LC88F58B0A Minimum Instruction Cycle Time (tCYC) 83.3 ns (12MHz) V = 4.5 to 5.5V DD 100 ns (10MHz) V = 3.0 to 5.5V DD 500 ns (2MHz) V = 2.2 to 5.5V DD Ports Normal withstand voltage I/O ports Ports whose I/O direction can be designated in 1 bit units : 52 (P0n, P1n, P2n, P30 to P33, P4n, P6n, P70 to P72, PA0 to PA3, PC2) Oscillation/normal withstand voltage I/O ports : 2 (PC0, PC1) Oscillation dedicated ports : 2 (CF1, CF2) Reset pins : 1 (RESB) TEST pins : 1 (TEST) Power pins : 6 (V 1 to 3, V 1 to 3) SS DD Timers Timer 0: 16-bit timer that supports PWM/toggle outputs 1) 5-bit prescaler 2) 8-bit PWM 2, 8-bit timer + 8-bit PWM mode selectable 3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator Timer 1: 16-bit timer with capture registers 1) 5-bit prescaler 2) May be divided into 2 channels of 8-bit timer 3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator Timer 2: 16-bit timer with capture registers 1) 4-bit prescaler 2) May be divided into 2 channels of 8-bit timer 3) Clock source selectable from system clock, OSC0, OSC1, and external events Timer 3: 16-bit timer that supports PWM/toggle outputs 1) 8-bit prescaler 2) 8-bit timer 2ch or 8-bit timer + 8-bit PWM mode selectable 3) Clock source selectable from system clock, OSC0, OSC1, and external events Timer 4: 16-bit timer that supports toggle outputs 1) Clock source selectable from system clock and prescaler 0 Timer 5: 16-bit timer that supports toggle outputs 1) Clock source selectable from system clock and prescaler 0 Base timer 1) Clock may be selected from OSC0 (32.768kHz crystal oscillator) and frequency-divided output of system clock. 2) Interrupts can be generated in 7 timing schemes. No.A1951-2/31