LV5011MD-AH ON Semiconductor

Ordering number : ENA2201A LV5011MD Bi-CMOS LSI LV5011MD Recommended Operating Conditions at Ta = 25C Parameter Symbol Conditions Ratings Unit Input voltage V 8.5 to 24 V IN Electrical Characteristics at Ta 25 C, V = 12V, unless otherwise specified. IN Ratings Parameter Symbol Conditions Unit min typ max Reference Voltage block Built-in Reference Voltage VREF 0.585 0.605 0.625 V VREF V line regulation VREF LN V = 8.5 to 24V 0.5 % IN IN Under Voltage Lockout Operation Start Input UVLOON 8 9 10 V Voltage Operation Stop Input UVLOOFF 6.3 7.3 8.3 V Voltage Hysteresis Voltage UVLOH 1.7 V Oscillation Frequency FOSC 5570 85kHz Maximum ON duty MAXDuty 93 % Comparator Input offset Voltage V RI 1 10mV IO (Between CS and REF IN) Input current IIOCS 160 nA IIOREF 80 nA CS pin max voltage VOM 1 V FET output stage Drain Leakage current ILK V=480V 100uA Drain Power FET ON resistor Ron VIN=12V 9.5 Minimum On time TMIN 200 ns Thermal protection Circuit Thermal shutdown TSD *Design guarantee 165 C temperature Thermal shutdown TSD *Design guarantee 30 C hysteresis TRIAC Stabilization Circuit Threshold of OUT2 VACS OUT2=High less than right record 2.8 3.0 3.2 V OUT2 sink current I 2I VIN=12V, OUT2=6V 0.6 mA O OUT2 source current I 2O VIN=12V, OUT2=6V 0.6 mA O V current CC UVLO mode V current IOFF V UVLOOFF 120 160 A IN CC IN Normal mode V current ION V=12V 1.0 mA IN CC IN V Over Voltage Protection Circuit IN V over voltage protection VOVP 24 27 30 V IN IN voltage VIN Current at OVP IINOVP V=30V 0.71.0 1.5mA IN CS terminal abnormal sensing circuit Abnormal sensing voltage CSOCP 1.9 V *: Design guarantee (value guaranteed by design and not tested before shipment) No.A2201-2/11