MC74LVX4052DG ON Semiconductor

MC74LVX4052 Analog Multiplexer/ Demultiplexer HighPerformance SiliconGate CMOS The MC74LVX4052 utilizes silicongate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF MC74LVX4052 12 X0 14 X1 13 X SWITCH 15 X X2 11 X3 COMMON ANALOG INPUTS/OUTPUTS 1 OUTPUTS/INPUTS Y0 5 3 Y1 Y Y SWITCH 2 Y2 4 Y3 10 A CHANNELSELECT 9 PIN 16 = V CC INPUTS B PIN 7 = V EE PIN 8 = GND 6 ENABLE NOTE: This device allows independent control of each switch. ChannelSelect Input A controls the XSwitch, Input B controls the YSwitch. Figure 1. Logic Diagram DoublePole, 4Position Plus Common Off MAXIMUM RATINGS Symbol Parameter Value Unit V Negative DC Supply Voltage (Referenced to GND) 7.0 to 0.5 V EE V Positive DC Supply Voltage (Referenced to GND) 0.5 to 7.0 V CC (Referenced to V ) 0.5 to 7.0 EE V Analog Input Voltage V 0.5 to V 0.5 V IS EE CC V Digital Input Voltage (Referenced to GND) 0.5 to 7.0 V IN I DC Current, Into or Out of Any Pin 20 mA T Storage Temperature Range 65 to 150 C STG T Lead Temperature, 1 mm from Case for 10 Seconds 260 C L T Junction Temperature under Bias 150 C J Thermal Resistance SOIC 143 C/W JA TSSOP 164 P Power Dissipation in Still Air, SOIC 500 mW D TSSOP 450 MSL Moisture Sensitivity Level 1 F Flammability Rating Oxygen Index: 30% 35% UL 94V0 0.125 in R V ESD Withstand Voltage Human Body Model (Note 1) 2000 V ESD Machine Model (Note 2) 200 Charged Device Model (Note 3) 1000 I Latchup Performance Above V and Below GND at 125C (Note 4) 300 mA LATCHUP CC Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22A114A. 2. Tested to EIA/JESD22A115A. 3. Tested to JESD22C101A. 4. Tested to EIA/JESD78.