MC74VHC00DR2G ON Semiconductor

MC74VHC00 Quad 2-Input NAND Gate The MC74VHC00 is an advanced high speed CMOS 2input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer MC74VHC00 1 A1 3 Y1 2 B1 4 A2 6 Y2 5 B2 Y = AB 9 A3 8 Y3 10 B3 12 A4 11 Y4 13 B4 Figure 2. Logic Diagram MAXIMUM RATINGS Symbol Parameter Value Unit V Positive DC Supply Voltage 0.5 to +7.0 V CC V Digital Input Voltage 0.5 to +7.0 V IN V DC Output Voltage 0.5 to V +0.5 V OUT CC I Input Diode Current 20 mA IK I Output Diode Current 20 mA OK I DC Output Current, per Pin 25 mA OUT I DC Supply Current, V and GND Pins 75 mA CC CC P Power Dissipation in Still Air SOIC Package 200 mW D TSSOP 180 T Storage Temperature Range 65 to +150 C STG V ESD Withstand Voltage Human Body Model (Note 1) >2000 V ESD Machine Model (Note 2) >200 Charged Device Model (Note 3) N/A I LatchUp Performance Above V and Below GND at 125C (Note 4) 300 mA LATCHUP CC Thermal Resistance, Junction to Ambient SOIC Package 143 C/W JA TSSOP 164 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22A114A 2. Tested to EIA/JESD22A115A 3. Tested to JESD22C101A 4. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit V DC Supply Voltage 2.0 5.5 V CC V DC Input Voltage 0 5.5 V IN V DC Output Voltage 0 V V OUT CC T Operating Temperature Range, All Package Types 55 125 C A t , t Input Rise or Fall Time V = 3.3 V + 0.3 V 0 100 ns/V r f CC V = 5.0 V + 0.5 V 0 20 CC Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.