MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter October 1987 Revised May 2002 MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter General Description Features The MM74C00, MM74C02, and MM74C04 logic gates Wide supply voltage range: 3V to 15V employ complementary MOS (CMOS) to achieve wide Guaranteed noise margin: 1V power supply operating range, low power consumption, High noise immunity: 0.45 V (typ.) CC high noise immunity and symmetric controlled rise and fall Low power consumption: 10 nW/package (typ.) times. With features such as this the 74C logic family is close to ideal for use in digital systems. Function and pin Low power: TTL compatibility: out compatibility with series 74 devices minimizes design Fan out of 2 driving 74L time for those designers already familiar with the standard 74 logic family. All inputs are protected from damage due to static dis- charge by diode clamps to V and GND. CC Ordering Code: Order Number Package Number Package Description MM74C00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74C00N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide MM74C02N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide MM74C04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74C04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering code. Connection Diagrams MM74C00 MM74C02 Top View Top View MM74C04 Top View 2002 Fairchild Semiconductor Corporation DS005877 www.fairchildsemi.comAbsolute Maximum Ratings(Note 1) Voltage at Any Pin 0.3V to V + 0.3V CC Operating Temperature Range 55C to +125C Storage Temperature Range 65C to +150C Operating V Range 3.0V to 15V CC Maximum V Voltage 18V CC Power Dissipation (P ) D Note 1: Absolute Maximum Ratings are those values beyond which the Dual-In-Line 700 mW safety of the device cannot be guaranteed. Except for Operating Tempera- ture Range they are not meant to imply that the devices should be oper- Small Outline 500 mW ated at these limits. The table of Electrical Characteristics provides conditions for actual device operation. Lead Temperature (Soldering, 10 seconds) 300C DC Electrical Characteristics Min/Max limits apply across the guaranteed temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS V Logical 1 Input Voltage V = 5.0V 3.5 IN(1) CC V V = 10V 8.0 CC V Logical 0 Input Voltage V = 5.0V 1.5 IN(0) CC V V = 10V 2.0 CC V Logical 1 Output Voltage V = 5.0V, I = 10 A4.5 OUT(1) CC O V V = 10V, I = 10 A9.0 CC O V Logical 0 Output Voltage V = 5.0V, I = 10 A0.5 OUT(0) CC O V V = 10V, I = 10 A1.0 CC O I Logical 1 Input Current V = 15V, V = 15V 0.005 1.0 A IN(1) CC IN I Logical 0 Input Current V = 15V, V = 0V 1.0 0.005 A IN(0) CC IN I Supply Current V = 15V 0.01 15 A CC CC LOW POWER TO CMOS V Logical 1 Input Voltage 74C, V = 4.75V V 1.5 V IN(1) CC CC V Logical 0 Input Voltage 74C, V = 4.75V 0.8 V IN(0) CC V Logical 1 Output Voltage 74C, V = 4.75V, I = 10 A4.4 V OUT(1) CC O V Logical 0 Output Voltage 74C, V = 4.75V, I = 10 A0.4V OUT(0) CC O CMOS TO LOW POWER V Logical 1 Input Voltage 74C, V = 4.75V 4.0 V IN(1) CC V Logical 0 Input Voltage 74C, V = 4.75V 1.0 V IN(0) CC V Logical 1 Output Voltage 74C, V = 4.75V, I = 360 A2.4 V OUT(1) CC O V Logical 0 Output Voltage 74C, V = 4.75V, I = 360 A0.4V OUT(0) CC O OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25C (short circuit current) I Output Source Current V = 5.0V, V = 0V, V = 0V 1.75 mA SOURCE CC IN(0) OUT I Output Source Current V = 10V, V = 0V, V = 0V 8.0 mA SOURCE CC IN(0) OUT I Output Sink Current V = 5.0V, V = 5.0V, V = V 1.75 mA SINK CC IN(1) OUT CC I Output Sink Current V = 10V, V = 10V, V = V 8.0 mA SINK CC IN(1) OUT CC AC Electrical Characteristics (Note 2) T = 25C, C = 50 pF, unless otherwise specified A L Symbol Parameter Conditions Min Typ Max Units MM74C00, MM74C02, MM74C04 t , t Propagation Delay Time to V = 5.0V 50 90 pd0 pd1 CC ns Logical 1 or 0 V = 10V 30 60 CC C Input Capacitance (Note 3) 6.0 pF IN C Power Dissipation Capacitance Per Gate or Inverter (Note 4) 12 pF PD Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: C determines the no load AC power consumption of any CMOS device. PD For complete explanation see Family Characteristics Application NoteAN-90. www.fairchildsemi.com 2 MM74C00 MM74C02 MM74C04