MM74HC123A Dual Retriggerable Monostable Multivibrator September 1983 Revised May 2001 MM74HC123A Dual Retriggerable Monostable Multivibrator General Description Features The MM74HC123A high speed monostable multivibrators Typical propagation delay: 25 ns (one shots) utilize advanced silicon-gate CMOS technol- Wide power supply range: 2V6V ogy. They feature speeds comparable to low power Schot- Low quiescent current: 80 A maximum (74HC Series) tky TTL circuitry while retaining the low power and high Low input current: 1 A maximum noise immunity characteristic of CMOS circuits. Fanout of 10 LS-TTL loads Each multivibrator features both a negative, A, and a posi- Simple pulse width formula T = RC tive, B, transition triggered input, either of which can be used as an inhibit input. Also included is a clear input that Wide pulse range: 400 ns to (typ) when taken low resets the one shot. The MM74HC123A Part to part variation: 5% (typ) can be triggered on the positive transition of the clear while Schmitt Trigger A & B inputs allow rise and fall times to A is held LOW and B is held HIGH. be as slow as one second The MM74HC123A is retriggerable. That is it may be trig- gered repeatedly while their outputs are generating a pulse and the pulse will be extended. Pulse width stability over a wide range of temperature and supply is achieved using linear CMOS techniques. The out- put pulse equation is simply: PW = (R ) (C ) where EXT EXT PW is in seconds, R is in ohms, and C is in farads. All inputs are protected from damage due to static discharge by diodes to V and ground. CC Ordering Code: Order Number Package Number Package Description MM74HC123AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HC123ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC123AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC123AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Timing Component Connection Diagram Note: Pin 6 and Pin 14 must be hard-wired to GND. Top View 2001 Fairchild Semiconductor Corporation DS005206 www.fairchildsemi.comTruth Table Inputs Outputs Clear AB Q Q LX X L H XH X L H XX L L H HL H H LH H = HIGH Level L = LOW Level = Transition from LOW-to-HIGH = Transition from HIGH-to-LOW = One HIGH Level Pulse = One LOW Level Pulse X = Irrelevant Logic Diagram www.fairchildsemi.com 2 MM74HC123A