MM74HC32 Quad 2-Input OR Gate
February 2008
MM74HC32
Quad 2-Input OR Gate
Features General Description
Typical propagation delay: 10ns The MM74HC32 OR gates utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
Wide power supply range: 2V6V
LS-TTL gates with the low power consumption of stan-
Low quiescent current: 20A maximum (74HC Series)
dard CMOS integrated circuits. All gates have buffered
Low input current: 1A maximum
outputs providing high noise immunity and the ability to
Fanout of 10 LS-TTL loads
drive 10 LS-TTL loads. The 74HC logic family is func-
tionally as well as pin-out compatible with the standard
74LS logic family. All inputs are protected from damage
due to static discharge by internal diode clamps to V
CC
and ground.
Ordering Information
Package
Order Number Number Package Description
MM74HC32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Y = A + B
(1 of 4)
Top View
1983 Fairchild Semiconductor Corporation www.fairchildsemi.com
MM74HC32 Rev. 1.3.0MM74HC32 Quad 2-Input OR Gate
(1)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Rating
V Supply Voltage 0.5 to +7.0V
CC
V DC Input Voltage 1.5 to V +1.5V
IN CC
V DC Output Voltage 0.5 to V +0.5V
OUT CC
I , I Clamp Diode Current 20mA
IK OK
I DC Output Current, per pin 25mA
OUT
I DC V or GND Current, per pin 50mA
CC CC
T Storage Temperature Range 65C to +150C
STG
P Power Dissipation
D
Note 2 600mW
S.O. Package only 500mW
T Lead Temperature (Soldering 10 seconds) 260C
L
Notes:
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating plastic N package: 12mW/C from 65C to 85C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Min. Max. Units
V Supply Voltage 2 6 V
CC
V , V DC Input or Output Voltage 0 V V
IN OUT CC
T Operating Temperature Range 40 +85 C
A
t , t Input Rise or Fall Times
r f
V = 2.0V
1000 ns
CC
V = 4.5V 500 ns
CC
V = 6.0V 400 ns
CC
1983 Fairchild Semiconductor Corporation www.fairchildsemi.com
MM74HC32 Rev. 1.3.0 2