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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.MM74HC86 Quad 2-Input Exclusive OR Gate
May 2012
MM74HC86
Quad 2-Input Exclusive OR Gate
Description
Features
The MM74HC86 exclusive OR gate utilizes advanced
Typical Propagation Delay: 9ns
silicon-gate CMOS technology to achieve operating
speeds similar to equivalent LS-TTL gates, while
Wide Operating Voltage Range: 26V
maintaining the low power consumption and high noise
Low Input Current: 1mA Maximum
immunity characteristic of standard CMOS integrated
circuits. These gates are fully buffered and have a
Low Quiescent Current: 20mA Max. (74 Series)
fanout of 10 LS-TTL loads. The 74HC logic family is
Output Drive Capability: 10 LS-TTL Loads
functionally as well as pin-out compatible with the
standard 74LS logic family. All inputs are protected from
damage due to static discharge by internal diode clamps
to V and ground.
CC
Table 1. Truth Table
Inputs Outputs
(1)
A B Y
L L L
L H H
H L H
H H L
Note:
1. Y A B AB AB
Figure 1. Pin Assignments (Top View)
Ordering Information
Operating
Part Number Package Packing Method
Temperature Range
MM74HC86M Tube
14-Lead, Small Outline Integrated Circuit
(SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC86MX Tape & Reel
-40 to +85C
MM74HC86MTC Tube
14-Lead, Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC86MTCX Tape & Reel
Note:
2. Pb-Free package per JEDEC J-STD-020B.
1983 Fairchild Semiconductor Corporation www.fairchildsemi.com
MM74HC86 Rev. 1.4.0