NB7L216 2.5 V / 3.3 V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator www.onsemi.com with Internal Termination Description The NB7L216 is a differential receiver/driver with high gain output 1 targeted for high frequency applications. The device is functionally QFN16 equivalent to the NBSG16 but with much higher gain output. This MN SUFFIX highly versatile device provides 35 dB of gain up to 7 GHz. CASE 485G Inputs incorporate internal 50 termination resistors and accept Negative ECL (NECL), Positive ECL (PECL), LVTTL, LVCMOS, MARKING DIAGRAM* CML, or LVDS. Outputs are Reduced Swing ECL (RSECL), 400 mV. 16 The V pin is an internally generated voltage supply available to BB 1 this device only. V is used as a reference voltage for single-ended BB NB7L NECL or PECL inputs. For all single-ended input conditions, the 216 unused complementary differential input should be connected to V BB ALYW as a switching reference voltage. V may also rebias AC coupled BB inputs. When used, decouple V via a 0.01 F capacitor and limit BB A = Assembly Location current sourcing or sinking to 0.5 mA. When not used, V output BB L = Wafer Lot should be left open. Y = Year Application notes, models and support documentation are available W = Work Week = Pb-Free Package at www.onsemi.com. (Note: Microdot may be in either location) *For additional marking information, refer to Features Application Note AND8002/D. High Gain of 35 dB from DC to 7 GHz Typical VTD High IIP3: 0 dBm Typical 20 mV Minimum Input Voltage Swing 50 Maximum Input Clock Frequency up to 8.5 GHz Maximum Input Data Rate up to 12 Gb/s Typical Q D < 0.5 ps of RMS Clock Jitter Q D < 9 ps of Data Dependent Jitter 120 ps Typical Propagation Delay 50 30 ps Typical Rise and Fall Times VTD RSPECL Output with Operating Range: Figure 1. Functional Block Diagram V = 2.375 V to 3.465 V with V = 0 V CC EE RSNECL Output with RSNECL or NECL Inputs with Operating ORDERING INFORMATION Range: V = 0 V with V = 2.375 V to 3.465 V CC EE RSECL Output Level (400 mV Peak-to-Peak Output), Device Package Shipping 50 Internal Input Termination Resistors (Temperature-Coefficient NB7L216MNG QFN16 123 Units / Tube (Pb-Free) of < 6.38 m /C) NB7L216MNR2G QFN16 3000 Tape & Reel V ECL Reference Voltage Output BB (Pb-Free) This Device is Pb-Free, Halogen Free and is RoHS Compliant For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: August, 2016 Rev. 6 NB7L216/DNB7L216 V V V V Exposed Pad (EP) EE BB EE EE 16 15 14 13 VTD 1 12 V CC Device DDJ = 3 ps 2 11 D Q NB7L216 D 3 10 Q VTD 4 9 V CC TIME (17 ps/div) 56 7 8 Figure 3. Typical Output Waveform at V V V V EE EE EE EE 23 12 Gb/s with PRBS 2 1 (V = 400 mV, INPP Input Signal DDJ = 12 ps) Figure 2. QFN-16 Pinout (Top View) Table 1. PIN DESCRIPTION Pin Name I/O Description 1 VTD Internal 50 termination pin. See Table 7. Note 1 2 D LVPECL, CML, Inverted differential input. Note 1. LVCMOS, LVDS, LVTTL Input 3 D LVPECL, CML, Noninverted differential input. Note 1. LVCMOS, LVDS, LVTTL Input 4 VTD Internal 50 termination pin. See Table 7. Note 1. 15 V Internally generated ECL reference voltage supply. BB 5, 6, 7, 8, 13, 14, 16 V Negative supply voltage. All V pins must be externally connected to power EE EE supply to guarantee proper operation. 9, 12 V Positive supply voltage. All V pins must be externally connected to power CC CC supply to guarantee proper operation 10 Q RSECL Output Noninverted differential output. Typically receiver terminated with 50 resistor to V = V 2.0 V. TT CC 11 Q RSECL Output Inverted differential output. Typically receiver terminated with 50 resistor to V = V 2.0 V. TT CC EP Exposed pad (EP). Thermally exposed pad on the package bottom must be attached to a heat sinking conduit. It is recommended to connect the EP to the lower potential, V . EE 1. In the differential configuration when the input termination pins (VTD, VTD) are connected to a common termination voltage and if no signal is applied on D/D input then the device will be susceptible to self-oscillation. www.onsemi.com 2 VOLTAGE (60 mV/div)