NB7N017M 3.3 V SiGe 8Bit Dual Modulus Programmable Divider/Prescaler with CML Outputs Description www.onsemi.com The NB7N017M is a high speed 8-bit dual modulus programmable divider/prescaler with 16 mA CML outputs capable of switching at input frequencies greater than 3.5 GHz. The CML output structure contains internal 50 source termination resistor to V . The CC device generates 400 mV output amplitude with 50 receiver resistor to V . This I/O structure enables easy implementation of CC the NB7N017M in 50 systems. 152 The differential inputs contain 50 termination resistors to VT QFN52 pads and all differential inputs accept RSECL, ECL, LVDS, MN SUFFIX LVCMOS, LVTTL, and CML. CASE 485M01 Internally, the NB7N017M uses a > 3.5 GHz 8-bit programmable down counter. A select pin, SEL, is used to select between two MARKING DIAGRAM* words, Pa 0:7 and Pb 0:7 , that are stored in REGa and REGb 52 respectively. Two parallel load pins, PLa and PLb, are used to load 1 the level triggered programming registers, REGa and REGb, respectively. A differential clock enable, CE, pin is available. NB7N The NB7N017M offers a differential output, TC. Terminal count 017M AWLYYWWG output, TC, goes high for one clock cycle when the counter has reached the all zeros state. To reduce output phase noise, TC is retimed with the rising edge triggered latches. A = Assembly Site Features WL = Wafer Lot YY = Year Maximum Input Clock Frequency > 3.5 GHz Typical WW = Work Week Differential CLK Clock Input G = Pb-Free Package Differential CE Clock Enable Input *For additional marking information, refer to Differential SEL Word Select Input Application Note AND8002/D. 50 Internal Input and Output Termination Resistors Differential TC Terminal Count Output ORDERING INFORMATION All Outputs 16 mA CML with 50 Internal Source Termination to V CC Device Package Shipping All Single-Ended Control Pins CMOS and PECL/NECL Compatible NB7N017MMNG QFN52 260 Tray JEDEC Counter Programmed Using One of Two Single-Ended Words, (Pb-Free) Pa 0:7 and Pb 0:7 , Stored in REGa and REGb 2000/Tape & Reel NB7N017MMNR2G QFN52 REGa and REGb Implemented with Level Triggered Latch (Pb-Free) Compatible with Existing 3.3 V LVEP, EP, and SG Devices For information on tape and reel specifications, in- Ability to Program the Divider without Disturbing Current Settings cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Positive CML Output Operating Range: Brochure, BRD8011/D. V = 3.0 V to 3.465 V with V = 0 V CC EE Negative CML Output Operating Range: V = 0 V with V = 3.0 V to 3.465 V CC EE V Reference Voltage Output BB CML Output Level: 400 mV Peak-Peak Output with 50 Receiver Resistor to V CC These Devices are Pb-Free, Halogen Free and are RoHS Compliant Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: August, 2016 Rev. 5 NB7N017M/DNB7N017M Exposed Pad (EP) V V 1 39 EE CC 38 PLb PLa 2 Pb0 Pa0 3 37 Pb1 Pa1 4 36 35 Pb2 Pa2 5 V 6 34 V CC CC 7 33 Pb3 Pa3 NB7N017M V 8 32 V EE EE Pa4 9 31 Pb4 Pa5 10 30 Pb5 Pa6 11 29 Pb6 12 28 Pb7 Pa7 13 27 NC NC Figure 1. Pinout (Top View) www.onsemi.com 2 V 52 VTSEL EE 14 51 SEL V 15 EE SEL MR 16 50 VTSEL V 49 CC 17 NC VTCLK 18 48 NC 19 47 CLK V 46 CLK 20 CC VTCLK TC 21 45 V TC 22 44 BB VTCE V 23 43 CC CE NC 24 42 CE V 25 41 EE V VTCE EE 26 40