NC7SV58P6X ON Semiconductor

DATA SHEET www.onsemi.com TinyLogic ULP-A Universal MARKING Configurable Logic Gates DIAGRAM SIP6 1.45X1.0 CCKK NC7SV57, NC7SV58 MicroPak XYZ CASE 127EB The NC7SV57 and NC7SV58 are universal configurable logic gates Pin 1 in tiny footprint packages. The devices are designed to operate = for V 0.9 V to 3.6 V. CC UDFN6 1.0X1.0, 0.35P CCKK MicroPak2 XYZ Features CASE 517DP Designed for 0.9 V to 3.6 V V Operation CC Pin 1 2.4 ns t at 3.3 V (Typ) PD CC = Specific Device Code Inputs/Outputs OverVoltage Tolerant up to 3.6 V KK = 2Digit Lot Run Traceability Code XY = 2Digit Date Code I Supports Partial Power Down Protection OFF Z = Assembly Plant Code Source/Sink 24 mA at 3.3 V Available in SC88 and MicroPak Packages These Devices are PbFree, Halogen Free/BFR Free and are RoHS XXXM SC88 CASE 419B02 Compliant 1 6 I2 I1 XXX = Specific Device Code I1 1 6 I2 M = Date Code = PbFree Package GND 2 5 V 2 5 CC GND V CC ORDERING INFORMATION I0 3 4 Y See detailed ordering, marking and shipping information on 4 3 I0 Y page 9 of this data sheet. SC88 MicroPak Figure 1. Pinout Diagrams (Top Views) PIN ASSIGNMENT Pin SC88 MicroPak 1 I1 I1 2 GND GND 3 I0 I0 4 Y Y 5 V V CC CC 6 I2 I2 Semiconductor Components Industries, LLC, 2002 1 Publication Order Number: August, 2021 Rev. 3 NC7SV58/DNC7SV57, NC7SV58 FUNCTION TABLE Inputs NC7SV57 NC7SV58 I2 I1 I0 Y = (I0) (I2) + (I1) (I2) Y = (I0) (I2) + (I1) (I2) L L L H L L L H L H L H L H L L H H L H H L L L H H L H L H H H L H L H H H H L FUNCTION SELECTION TABLE 2Input Logic Function Device Selection Connection Configuration 2Input AND NC7SV57 Figure 2 2Input AND with inverted input NC7SV58 Figure 8, 9 2Input AND with both inputs inverted NC7SV57 Figure 5 2Input NAND NC7SV58 Figure 7 2Input NAND with inverted input NC7SV57 Figure 3, 4 2Input NAND with both inputs inverted NC7SV58 Figure 10 2Input OR NC7SV58 Figure 10 2Input OR with inverted input NC7SV57 Figure 3, 4 2Input OR with both inputs inverted NC7SV58 Figure 7 2Input NOR NC7SV57 Figure 5 2Input NOR with inverted input NC7SV58 Figure 8, 9 2Input NOR with both inputs inverted NC7SV57 Figure 2 2Input XOR NC7SV58 Figure 11 2Input XNOR NC7SV57 Figure 6 www.onsemi.com 2