NC7SZ175P6X_F080 ON Semiconductor

TinyLogic UHS D-Type Flip-Flop with Asynchronous Clear NC7SZ175 Description www.onsemi.com The NC7SZ175 is a single positive edgetriggered Dtype CMOS FlipFlop with Asynchronous Clear from ON Semiconductors Ultra MARKING High Speed Series of TinyLogic in the space saving SC70 6lead DIAGRAMS package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad V operating range. The SIP6 1.45x1.0 C4KK CC CASE 127EB XYZ device is specified to operate over the 1.65 V to 5.5 V V range. The CC inputs and output are high impedance when V is 0 V. Inputs tolerate CC Pin 1 voltages up to 5.5 V independent of V operating voltage. This CC single flipflop will store the state of the D input that meets the setup 6 and hold time requirements on the LOWtoHIGH Clock (CP) Z75M transition. A LOW input to Clear sets the Q output to LOW level. The SC88 CASE 419B02 Clear input is independent of clock. 1 Features Space Saving SC88 6Lead Package C4, Z75 = Specific Device Code Ultra Small MicroPak Leadless Package KK = 2Digit Lot Run Traceability Code Ultra High Speed: t = 2.6 ns Typ into 50 pF at 5 V V PD CC XY = 2Digit Date Code Format Z = Assembly Plant Code High Output Drive: 24 mA at 3 V V CC M = Date Code* Broad V Operating Range: 1.65 V to 5.5 V CC = PbFree Package Matches the Performance of LCX when Operated at 3.3 V V CC (Note: Microdot may be in either location) Power Down High Impedance Inputs / Output *Date Code orientation and/or position may Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation vary depending upon manufacturing location. Proprietary Noise / EMI Reduction Circuitry Implemented These Devices are PbFree, Halogen Free/BFR Free and are RoHS ORDERING INFORMATION Compliant See detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. IEEC / IEC C CP D Q Figure 1. Logic Symbol Semiconductor Components Industries, LLC, 2004 1 Publication Order Number: January, 2021 Rev. 4 NC7SZ175/DNC7SZ175 Connection Diagrams CP 1 CP 6 C CP 1 6 C C GND 2 5 V CC GND 2 5 V D Q CC DQ3 4 D 3 4 Q Figure 2. SC70 (Top View) Figure 4. MicroPak (Top Through View) (Top View) AAA Pin One AAA represents Product Code Top Mark see ordering code. NOTE: Orientation of Top Mark determines Pin One location. Read the Top Product Code Mark left to right, Pin One is the lower left pin (see diagram). Figure 3. Pin 1 Orientation PIN DESCRIPTIONS FUNCTION TABLE Pin Name Description Inputs Output D Data Input CP D C Q CP Clock Pulse Input L H L C Clear Input H H H Q FlipFlop Output X H Qn X X L L H = HIGH Logic Level Qn = No Change in Data L = LOW Logic Level X = Immaterial www.onsemi.com 2