DATA SHEET www.onsemi.com High Speed Dual-Channel, Bi-Directional Ceramic Digital Isolator SOIC16 W NCID9211 CASE 751EN Description The NCID9211 is a galvanically isolated full duplex, bidirectional, MARKING DIAGRAM highspeed dualchannel digital isolator with output enable. This device supports isolated communications thereby allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. AWLYWW It utilizes onsemis patented galvanic offchip capacitor isolation technology and optimized IC design to achieve high insulation and 9211 high noise immunity, characterized by high common mode rejection and power supply rejection specifications. The thick ceramic substrate yields capacitors with ~25 times the thickness of thin film onchip capacitors and coreless transformers. The result is a combination of the electrical performance benefits that digital isolators offer with the A = Assembly Location safety reliability of a >0.5 mm insulator barrier similar to what has WL = Wafer Lot / Assembly Lot historically been offered by optocouplers. Y = Year The device is housed in a 16pin wide body small outline package. WW = Work Week 9211 = Specific Device Code Features OffChip Capacitive Isolation to Achieve Reliable High Voltage Insulation ORDERING INFORMATION DTI (Distance Through Insulation): 0.5 mm See detailed ordering and shipping information on page 10 of this data sheet. Maximum Working Insulation Voltage: 2000 V peak Full Duplex, Bidirectional Communication 100 KV/ s Minimum Common Mode Rejection High Speed: 50 Mbit/s Data Rate (NRZ) 25 ns Maximum Propagation Delay 10 ns Maximum Pulse Width Distortion 8 mm Creepage and Clearance Distance to Achieve Reliable High Voltage Insulation. Specifications Guaranteed Over 2.5 V to 5.5 V Supply Voltage and 40C to 125C Extended Temperature Range Over Temperature Detection Output Enable Function (Primary and Secondary Side) NCIV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 Qualified and PPAP Capable (Pending) Safety and Regulatory Approvals UL1577, 5000 V for 1 Minute RMS DIN EN/IEC 6074717 (Pending) Typical Applications Isolated PWM Control Programmable Logic Control Industrial Fieldbus Communications Isolated Data Acquisition System 2 Microprocessor System Interface (SPI, I C, etc.) Voltage Level Translator Semiconductor Components Industries, LLC, 2020 1 Publication Order Number: September, 2021 Rev. 3 NCID9211/DNCID9211 PIN CONFIGURATION BLOCK DIAGRAM V 1 16 V DD1 DD 2 GND 1 2 15 GND 2 NC 3 14 NC EN1 4 13 EN 2 V 5 12 V OA INA V 6 11 V INB OB 7 10 NC NC 8 9 GND 2 GND 1 Figure 2. Functional Block Diagram Figure 1. Pin and Channel Configuration PIN DEFINITIONS Pin No. Name Description 1 V Power Supply, Primary Side DD1 2 GND1 Ground, Primary Side 3 NC No Connect 4 EN1 Enable, Primary Side 5 V Output, Channel A OA 6 V Input, Channel B INB 7 NC No Connect 8 GND1 Ground, Primary Side 9 GND2 Ground, Secondary Side 10 NC No Connect 11 V Output, Channel B OB 12 V Input, Channel A INA 13 EN2 Enable, Secondary Side 14 NC No Connect 15 GND2 Ground, Secondary Side 16 V Power Supply, Secondary Side DD2 TRUTH TABLE (Note 1) V EN V V V Comment INX X DDI DDO OX H H / NC Power Up Power Up H Normal Operation L H / NC Power Up Power Up L Normal Operation X L Power Up Power Up HiZ X H / NC Power Power Up L Default low V return to normal operation when V OX DDI Down change to Power Up X H / NC Power Up Power Undetermined V return to normal operation when V change to OX DDO Down (Note 2) Power Up 1. V = Input signal of a given channel (A or B). EN = Enable pin for primary or secondary side (1 or 2). V = Output signal of a given channel INX X OX (A or B). V = Inputside V . V = Outputside V . X = Irrelevant. H = High level. L = Low level. NC = No Connection. DDI DD DDO DD 2. The outputs are in undetermined state when V < V . DDO UVLO www.onsemi.com 2 ISOLATION