NCL30051LEDGEVB 35-50 Volt, Up to 1.5 Amp, Offline Power Factor Corrected LED Driver with Flexible Dimming Options NCL30051LEDGEVB Beyond the power stage design, circuitry is provided for PWM dimming frequency 160 Hz demonstrating three types of dimming control: 300 Hz with external signal input (referenced to a secondary side signal Analog dimming with a 0 to 10 V programming signal ground) Bilevel dimming with a simple logic level input Dimming range > 10:1 signal 010 V (100K) analog voltage input PWM dimming using an onboard oscillator with dimming, 1 = minimum, 10 V is 100% variable pulse width. on (range dependent on nominal AC These three dimming functions are incorporated on an input) optional plugin DIM card. Without the card, the demo Protection: Short Circuit Protection board can be dimmed with a user provided PWM input Open Circuit Protection < 60 V peak signal operating from 150 to 300 Hz. The maximum output Over Temperature (optional) voltage can be adjusted via selection of a single resistor Over Current Protection Auto however, it is compliant enough to handle almost a 2:1 recovery output voltage compliance range depending on the string Over voltage protection (input and forward voltage and worst case high line voltage. The optional output) default output current is set at 1 A, but a maximum DC output current of 1.5 A is available by modifying a single Primary Side Circuitry resistor value. Higher currents can be supported with The primary side circuit schematic is shown in Figure 1. different transformer designs. The power level of this design It contains the PFC and resonant halfbridge along with the is targeted at applications operation below 60 Vdc associated bias, drive, and primary feedback circuitry. As maximum and below 100 VA to be under the maximum shown in the primary side schematic, the circuit grounds power requirements of IEC (EN) 609501 (UL1310 should are segregated into three areas (logic, drive, and Class 2) supplies. The specification table below lists the key power) and interconnected at strategic star or tree points design objectives. as shown to minimize ground loops and cross talk interaction. For optimum circuit performance and stability, Specifications it is critical that star grounding be used for the PCB layout. Universal Input: 90 265 Vac (up to 305 Vac with Logic level timing and filter components such as C10, C12, component changes) C14, C15, C17, and C16 should be located as close to main Frequency 47 63 Hz controller U1 as possible. Power Factor: > 0.9 (50100% of Load with Jumper JMP1 and test point terminals are provided to dimming) facilitate testing the PFC and resonant halfbridge Harmonic Content EN6100032 Class C Compliance separately. Jumper JMP3 can be used as a wire loop for a Efficiency > 88% at 50 100% of 50 W, I = 1 A out clipon current probe to check the current waveform profile / V = 50 V f and tuning of the resonant halfbridge. Target UL1310 Class 2 Dry/Damp, isolated < Referring to Figure 1, a combination common and 100 VA and < 60 V peak differential mode conducted EMI filter is incorporated at the V Range: 35 to 50 Vdc (selectable by resistor max mains input. The leakage inductance of L1 in conjunction divider) with X capacitors C1 and C2 form a differential mode Constant Current filter. Common mode filtering is achieved via the coupled I Range: 0.7 1.5 A, 1 A nominal (selectable by out inductance of L1 and Y2 capacitor C27 which ac couples resistor) the primary and secondary grounds. In this particular design, V Compliance >50 to 100% of V out out the simple common mode filter indictor of L1 was sufficient Current Tolerance 2% or better to pass EN55022, Level A for commercial applications. A Cold Startup < 1 sec typical to 50% of load plot of the conducted EMI is shown in Figure 14 and the Pout Maximum: 60 W harmonic line current profile is shown in Figure 15. Dimming: Two Step Bilevel Analog Dimming PWM dimming with optional DIM board