NCN8026AMNGEVB ON Semiconductor

NCN8026AMNGEVB NCN8026A Evaluation Board User s Manual NCN8026AMNGEVB TEST PROCEDURE Refer to Figure 2 for an overview of the main features of respectively. Refer to the recommended operating ranges for the evaluation board. VDD and VDDP in the datasheet. Use VDD = VDDP = 5 V to get started. Initial Setup The initial setup given here is recommended before Clock Frequency starting measurements on the board. CLKDIV1 and CLKDIV2 select the frequency divider for the card clock CCLK according to Table 3 given below. Set the CMDVCC/ in the OFF position (High). Set CS/ in the ON position: Chip selected, position Table 3. CVCC PROGRAMMING Low. CLKDIV1 CLKDIV2 CCLK Frequency Set CLKDIV1 and CLKDIV2 into low position (lowest 1 0 f / 1 CLKIN frequency F ) CLKIN VESL0 and VSEL1 are used to change the output 1 1 f / 2 CLKIN CVCC (card power supply) or the smart card interface 0 1 f / 4 CLKIN mode which can be 1.8 V, 3.0 V or 5.0 V. Change 0 0 f / 8 CLKIN VSEL0 and VSEL1 using the switches (see Figure 2) according to Table 2 below. When VSEL0 = 0 then The Clock VSEL1 is in the mode 5 V / 3 Vbar, when VSEL0=1 The clock is applied externally (SMB connector). Refer to then VSEL1 is in the mode 1.8 V / 3 Vbar. The initial the datasheet for the recommended frequency and voltage setup can be VSEL0 = 0 and VSEL1 = 1 for selecting levels that can be applied at CLKIN. the 5 V mode. The CVCC output voltage can be changed on the fly when the smart card interface is Card Presence active (/CMDVCC = Low). Nevertheless, it is The typical socket is normally open, so PRES/ has been recommended to change CVCC after having chosen nevertheless the PRES and PRES/ test points can deactivated the device then reconfiguring CVCC by also be used for signaling the presence of a card and starting setting the appropriate VSEL0 and VSEL1 and up the circuit. If not using a smart card, connect PRES/ to reactivating the smart card interface. ground. Table 2. CVCC PROGRAMMING Start the measurement VSEL0 VSEL1 CVCC To start the measurments, set the board as it follows: 1. Set CLKDIV1 and CLKDIV2 to select the correct 0 0 3.0 V frequency. 0 1 5.0 V 2. Set VSEL0 and VSEL1 to select the correct output 1 0 3.0 V voltage. 3. Check that the 1 k potentiometer jumper is 1 1 1.8 V turned to 1 k . 4. Set /CS low. As a precaution, if using the built-in resistive load, turn 5. Set CMDVCC/ high. the 1 k potentiometer to obtain a resistor output value 6. Check that VDD and VDDP are set to 5 V, and set of 1 k , and then connect the jumper. the current limit to 100 mA. Turn on the power supplies VDD and VDDP. DC Power Supplies 7. Toggle /CMDVCC from High to Low to start the Two power supplies are used to bias the demo board. device (activation sequence run). VDDP is the input voltage of LDO Regulator. VDD is the 8. Change the CVCC output voltage with the VSEL0 digital power supply which biases the input stages of the and VSEL1 switches. NCN8026A device (control and signal inputs). 9. Apply a clock to CLKIN and observe the card VDD and VDDP must be connected to the board to ensure correct operation. Connect the VDD and VDDP power clock at CCLK. Use CLKDIV1 and CLKDIV2 to supplies using the 2 pin male connectors J4 and J3 change the clock frequency.