NCP115 LDO Regulator - High PSRR 300 mA The NCP115 is 300 mA LDO that provides the engineer with a very stable, accurate voltage with low noise suitable for space constrained, noise sensitive applications. In order to optimize performance for www.onsemi.com battery operated portable applications, the NCP115 employs the dynamic quiescent current adjustment for very low I consumption at Q noload. MARKING DIAGRAMS Features Operating Input Voltage Range: 1.7 V to 5.5 V XDFN4 XX M CASE 711AJ Available in Fixed Voltage Options: 0.8 V to 3.6 V 1 1 Contact Factory for Other Voltage Options XX = Specific Device Code Very Low Quiescent Current of Typ. 50 A M = Date Code Soft Start Feature with Two V Slew Rate Speed OUT 5 Standby Current Consumption: Typ. 0.1 A TSOP5 XX M 5 Low Dropout: 250 mV Typical at 300 mA 2.8 V CASE 483 1 1% Accuracy at Room Temperature 1 High Power Supply Ripple Rejection: 70 dB at 1 kHz XX = Device Code M = Date Code* Thermal Shutdown and Current Limit Protections = PbFree Package Available in XDFN4 and TSOP5 Packages (Note: Microdot may be in either location) Stable with a 1 F Ceramic Output Capacitor *Date Code orientation and/or position may vary depending upon manufacturing location. These are PbFree Devices Typical Applicaitons PIN CONNECTIONS PDAs, Mobile phones, GPS, Smartphones EN IN Wireless Handsets, Wireless LAN, Bluetooth , Zigbee 34 Portable Medical Equipment Other Battery Powered Applications V V IN OUT IN OUT NCP115 C C IN OUT EN 2 1 1 F ON GND Ceramic GND OUT OFF (Bottom View) Figure 1. Typical Application Schematic IN OUT 1 5 GND 2 EN 4 3 N/C (Top View) ORDERING INFORMATION See detailed ordering, marking and shipping information on page 15 of this data sheet. Semiconductor Components Industries, LLC, 2017 1 Publication Order Number: September, 2019 Rev. 4 NCP115/DNCP115 IN ENABLE THERMAL EN LOGIC SHUTDOWN BANDGAP MOSFET REFERENCE DRIVER WITH CURRENT LIMIT OUT AUTO LOW POWER MODE ACTIVE DISCHARGE* EN GND *Active output discharge function is present only in NCP115A and NCP115C devices. yyy denotes the particular V option. OUT Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. Pin No. (XDFN4) (TSOP5) Pin Name Description 1 5 OUT Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 F is need- ed from this pin to ground to assure stability. 2 2 GND Power supply ground. 3 3 EN Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode. 4 1 IN Input pin. A small capacitor is needed from this pin to ground to assure stability. 4 N/C Not connected. This pin can be tied to ground to improve thermal dissipation. EPAD Exposed pad should be connected directly to the GND pin. Soldered to a large ground cop- per plane allows for effective heat removal. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 1) V 0.3 V to 6 V V IN Output Voltage VOUT 0.3 V to V + 0.3 V or 6 V V IN Enable Input VEN 0.3 V to 6 V V Output Short Circuit Duration tSC s Maximum Junction Temperature T 150 C J(MAX) Storage Temperature T 55 to 150 C STG ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM ESD Capability, Machine Model (Note 2) ESD 200 V MM Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22A114, ESD Machine Model tested per EIA/JESD22 A115, Latchup Current Maximum Rating tested per JEDEC standard: JESD78. THERMAL CHARACTERISTICS (Note 3) Rating Symbol Value Unit Thermal Characteristics, XDFN4 1x1 mm R 208 C/W JA Thermal Resistance, JunctiontoAir Thermal Characteristics, TSOP5 R 162 C/W JA Thermal Resistance, JunctiontoAir 2 3. Single component mounted on 1 oz, FR 4 PCB with 645 mm Cu area. www.onsemi.com 2