DATA SHEET www.onsemi.com LDO Regulator - Ultra-Low MARKING Noise, High PSRR, RF and DIAGRAMS Analog Circuits WLCSP4 X A1 CASE 567JZ 250 mA WLCSP4 NCP163 X A1 XM CASE 567KA/567XW The NCP163 is a next generation of high PSRR, ultralow noise LDO capable of supplying 250 mA output current. Designed to meet XDFN4 the requirements of RF and sensitive analog circuits, the NCP163 XX M CASE 711AJ 1 device provides ultralow noise, high PSRR and low quiescent 1 current. The device also offer excelent load/line transients. The NCP163 is designed to work with a 1 F input and a 1 F output SOT235L ceramic capacitor. It is available in two thickness ultrasmall 0.35P, XXX M CASE 527AH WLCSP Packages, XDFN4 0.65P and industry standard SOT235L. Features Operating Input Voltage Range: 2.2 V to 5.5 V X, XXX = Specific Device Code M = Date Code Available in Fixed Voltage Option: 1.2 V to 5.3 V = PbFree Package 2% Accuracy Over Load/Temperature (Note: Microdot may be in either location) Ultra Low Quiescent Current Typ. 12 A Standby Current: Typ. 0.1 A Very Low Dropout: 80 mV at 250 mA PIN CONNECTIONS Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz IN OUT Ultra Low Noise: 6.5 V RMS Stable with a 1 F Small Case Size Ceramic Capacitors A2 A1 Available in WLCSP4: 0.64 mm x 0.64 mm x 0.33 mm WLCSP4: 0.64 mm x 0.64 mm x 0.4 mm B1 B2 XDFN4: 1 mm x 1 mm x 0.4 mm SOT235: 2.9 mm x 2.8 mm x 1.2 mm EN GND (Top View) (Top View) These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant IN 1 5 OUT Typical Applications Batterypowered Equipment GND 2 Wireless LAN Devices EN 3 4 NC Smartphones, Tablets Cameras, DVRs, STB and Camcorders (Top View) V V IN OUT IN OUT ORDERING INFORMATION NCP163 See detailed ordering, marking and shipping information on C EN IN C OUT page 18 of this data sheet. 1 F ON 1 F Ceramic Ceramic GND OFF Figure 1. Typical Application Schematics Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: November, 2021 Rev. 13 NCP163/DNCP163 IN ENABLE THERMAL EN LOGIC SHUTDOWN BANDGAP MOSFET REFERENCE INTEGRATED DRIVER WITH SOFT START CURRENT LIMIT OUT * ACTIVE DISCHARGE Version A only EN GND Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. Pin No. Pin No. Pin WLCSP4 SOT235L XDFN4 Name Description A1 1 4 IN Input voltage supply pin A2 5 1 OUT Regulated output voltage. The output should be bypassed with small 1 F ceramic capacitor. B1 3 3 EN Chip enable: Applying V < 0.4 V disables the regulator, Pulling V > 1.2 V EN EN enables the LDO. B2 2 2 GND Common ground connection 4 NC Not connected. Can be tied to ground plane. EPAD EPAD Exposed pad. Can be tied to ground plane for better power dissipation. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 1) V 0.3 V to 6 V IN Output Voltage V 0.3 to V + 0.3, max. 6 V V OUT IN Chip Enable Input V 0.3 to 6 V V CE Output Short Circuit Duration t unlimited s SC Maximum Junction Temperature T 150 C J Storage Temperature T 55 to 150 C STG ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM ESD Capability, Machine Model (Note 2) ESD 200 V MM ESD Capability, Charged Device Model (Note 2) ESD 1000 V CDM Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22A114 ESD Machine Model tested per EIA/JESD22 A115 ESD Charged Device Model tested per EIA/JESD22C101, Field Induced Charge Model Latchup Current Maximum Rating tested per JEDEC standard: JESD78. www.onsemi.com 2