LDO Regulator, 300 mA, Low Dropout Voltage, Ultra Low Noise, High PSRR with Power Good NCP164C www.onsemi.com The NCP164C is a 300 mA LDO, next generation of high PSRR, ultralow noise and low dropout regulators with Power Good open collector output. Designed to meet the requirements of RF and MARKING sensitive analog circuits, the NCP164C device provides ultralow DIAGRAMS noise, high PSRR and low quiescent current. The device also offer 5 excellent load/line transients. The NCP164C is designed to work with TSOP5 XXXAYW a 1 F input and a 1 F output ceramic capacitor. It is available in 5 CASE 483 industry standard TSOP5, WDFN6 0.65P, 2 mm x 2 mm and 1 1 DFNW8 0.65P, 3 mm x 3 mm. Features WDFN6 2x2, 0.65P XXM CASE 511BR Operating Input Voltage Range: 1.6 V to 5.0 V Available in Fixed Voltage Option: 1.2 V to 4.5 V 1 Adjustable Version Reference Voltage: 1.1 V P164 DFNW8 3x3, 0.65P XXX 2% Accuracy Over Load and Temperature CASE 507AD ALYW Ultra Low Quiescent Current Typ. 30 A 1 Standby Current: Typ. 0.1 A XXX = Specific Device Code Very Low Dropout: 110 mV at 300 mA for 3.3 V Variant A = Assembly Location L = Wafer Lot Ultra High PSRR: Typ. 85 dB at 10 mA, f = 1 kHz M = Month Code Ultra Low Noise: 9 V (Fixed Version) RMS Y = Year W = Work Week Stable with a 1 F Small Case Size Ceramic Capacitors = PbFree Package Available in TSOP5 3 mm x 1.5 mm x 1 mm CASE 483 (Note: Microdot may be in either location) WDFN6 2 mm x 2 mm x 0.75 mm CASE 511BR DFNW8 3 mm x 3 mm x 0.9 mm CASE 507AD PIN CONNECTONS These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant OUT 1 6 IN Typical Applications 2 5 ADJ/SNS GND GND Communication Systems 3 4 PG EN InVehicle Networking WDFN6 2x2 mm Telematics, Infotainment and Clusters (Top View) General Purpose Automotive V IN IN OUT NCP164C C C OUT IN 1 F 1 F EN PG GND Ceramic Ceramic ON OFF ORDERING INFORMATION See detailed ordering and shipping information on page 8 of Figure 1. Typical Application Schematic this data sheet. Semiconductor Components Industries, LLC, 2019 1 Publication Order Number: January, 2020 Rev. 1 NCP164C/DNCP164C Table 1. PIN FUNCTION DESCRIPTION Pin No. Pin No. Pin No. Pin TSOP5 WDFN6 DFNW8 Name Description 1 6 8 IN Input voltage supply pin 5 1 1 OUT Regulated output voltage. The output should be bypassed with small 1 F ceramic capacitor 3 4 7 EN Chip enable: Applying V < 0.2 V disables the regulator, Pulling V > 0.7 V EN EN enables the LDO 4 / 3 3 PG Power Good, open collector. Use 10 k to 100 k pullup resistor connected to output or input voltage 2 5 6 GND Common ground connection / 4 2 2 ADJ Adjustable output feedback pin (for adjustable version only) 2 2 SNS Sense feedback pin. Must be connected to OUT pin on PCB (for fixed versions only) 4, 5 N/C Not connected, pin can be tied to ground plane for better power dissipation EPAD EPAD EPAD Expose pad should be tied to ground plane for better power dissipation Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 1) V 0.3 to 5.3 V IN Output Voltage V 0.3 to V +0.3, max. 5.3 V OUT IN Chip Enable Input V 0.3 to 5.3 V CE Power Good Voltage V 0.3 to 5.3 V PG Power Good Current I 30 mA PG Output Short Circuit Duration t unlimited s SC Maximum Junction Temperature T 150 C J Storage Temperature T 55 to 150 C STG ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM ESD Capability, Charged Device Model (Note 2) ESD 1000 V CDM Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AECQ100002 (EIA/JESD22A114) ESD Charged Device Model tested per EIA/JESD22C101, Field Induced Charge Model www.onsemi.com 2