ecoSwitch Advanced Load Management Controlled Load Switch with Low R ON NCP45750 The NCP45750 load management device provides a component and areareducing solution for efficient power domain switching with www.onsemi.com inrush current limit via soft start. These devices are designed to integrate control and driver functionality with a high performance very low onresistance power MOSFET in a single package offering R TYP V DC I * ON IN MAX safeguards and monitoring via fault protection and powergood 5.9 m 3 V to 24 V 10 A signaling. This cost effective solution is ideal for power management *I is defined as the maximum steady state current the MAX and disconnect functions in USB TypeC ports and power management load switch can pass at room ambient temperature without applications requiring low power consumption in a small footprint. entering thermal lockout. See the SOA section for more information on transient current limitations. Features Advanced Controller with Charge Pump Integrated NChannel MOSFET with VeryLow R ON SoftStart via Controlled Slew Rate 1 DFN12, 3x3 Adjustable Slew Rate Control CASE 506DY Fault Detection with Power Good Output Thermal Shutdown and Under Voltage Lockout MARKING DIAGRAM ShortCircuit and Adjustable OverCurrent Protections Input Voltage Range 3 V to 24 V 750 ALYW Extremely Low Standby Current This is a RoHS/REACH Compliant Device Typical Applications 750 = Specific Device Code A = Assembly Location USB Type C Power Delivery L = Wafer Lot Servers, SetTop Boxes and Gateways Y = Year Notebook and Tablet Computers W = Work Week = PbFree Package Telecom, Networking (Note: Microdot may be in either location) Medical and Industrial Equipment HotSwap Devices and Peripheral Ports PIN CONFIGURATION V CC EN OCP PG VIN NC 1 12 V IN V 2 EN 11 OUT Thermal Bandgap Control Shutdown, & V 3 10 V Logic OUT CC Biases UVLO, & 13: V IN OCP V 4 9 OCP OUT NC 8 PG 5 Delay and Charge Slew Rate V 6 7 SR Pump SS Control (Top View) ORDERING INFORMATION SR V V SS OUT Device Package Shipping Figure 1. Block Diagram NCP45750IMN24TWG DFN12 3000 / Tape (RoHS/ & Reel REACH) Semiconductor Components Industries, LLC, 2018 1 Publication Order Number: February, 2021 Rev. 4 NCP45750/DNCP45750 Table 1. PIN DESCRIPTION Pin Name Function 2, 3, 4 V Source of MOSFET connected to load. Includes an internal bleed resistor to GND. All pins must be con- OUT nected to provide correct Rds, OCP, and current capability. 6 V Driver ground SS 7 SR Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND float if not used. 8 PG Activehigh, opendrain output that indicates when the gate of the MOSFET is fully charged, external pull up resistor 100 k to an external voltage source required tie to GND if not used. 9 OCP Overcurrent protection trip point adjustment made with a resistor to ground short to ground if over current protection is not needed. 10 V Driver supply voltage (3.0 V 5.5 V) CC 11 EN Activehigh digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND 12, 13 V Input voltage (3 V 24 V) Pin 13 should be used for high current (>0.5 A) IN Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage Range V 0.3 to 6 V CC Input Voltage Range V 0.3 to 30 V IN Output Voltage Range V 0.3 to 30 V OUT EN Input Voltage Range V 0.3 to 6 V EN PG Output Voltage Range (Note 1) V 0.3 to 6 V PG OCP Input Voltage Range V 0.3 to 6 V OCP Thermal Resistance, JunctiontoAmbient, Steady State (Note 2) 49.7 C/W R JA Thermal Resistance, JunctiontoCase (V Paddle) R 1.7 C/W IN JC Continuous MOSFET Current T = 25C (Note 2) I 10 A A MAX Load Power Range (Note 5) P 100 W LOAD Storage Temperature Range T 55 to 150 C STG Lead Temperature, Soldering (10 sec.) T 260 C SLD ESD Capability, Human Body Model (Notes 3 and 4) ESD 2 kV HBM ESD Capability, Charged Device Model (Notes 3 and 4) ESD 0.5 kV CDM Latchup Current Immunity (Note 3) LU 100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. PG is an open drain output that requires an external pullup resistor > 100 k to an external voltage source. 2. Surfacemounted on FR4 board using the minimum recommended pad size, 1 oz Cu. Over current protection will limit maximum realized current to 10 A at highest setting. 3. Tested by the following methods T = 25C: A ESD Human Body Model tested per JS001 ESD Charged Device Model per ESD JS 002 Latchup Current tested per JESD78 PG, OCP, and SR pins must be correctly connected for compliance 4. Rating is for all pins except for V and V which are tied to the internal MOSFETs Drain and Source. Typical MOSFET ESD performance IN OUT for V and V should be expected and these devices should be treated as ESD sensitive. IN OUT www.onsemi.com 2