ecoSwitch Advanced Load Management Controlled Load Switch with Reverse Current Protection and Low R ON NCP45760 www.onsemi.com The NCP45760 load management device provides a component and areareducing solution for efficient power domain switching with inrush current limit via soft start. This device is designed to integrate R TYP V *DC I ON IN MAX control and driver functionality with backtoback high performance 20 m 3.0 V 24 V 8.0 A low onresistance power MOSFETs in a single package. This cost *I is defined as the maximum steady state cur- MAX effective solution is ideal for reverse current applications and the rent the load switch can pass at room ambient tem- specific power management and disconnect functions used in USB perature without entering thermal lockout. See the TypeC and TypeC Power Delivery ports. SOA section for more information on transient cur- rent limitations. Features Advanced Controller with Charge Pump Integrated NChannel MOSFET with Low R ON SoftStart via Controlled Slew Rate 1 DFN12, 3x3 Adjustable Slew Rate Control CASE 506EN Fault Detection with Power Good Output Thermal Shutdown and Under Voltage Lockout MARKING DIAGRAM ShortCircuit and Adjustable OverCurrent Protections 760 Reversecurrent Protection ALYW Input Voltage Range 3 V to 24 V Extremely Low Standby Current This is a Pbfree, RoHS/REACH Compliant Device 760 = Specific Device Code A = Assembly Location Typical Applications L = Wafer Lot USB Type C Power Delivery Y = Year W = Work Week Reverse Current Load Switching Applications = PbFree Package Servers, SetTop Boxes and Gateways (Note: Microdot may be in either location) Notebook and Tablet Computers Telecom, Networking, Medical and Industrial Equipment PIN CONFIGURATION HotSwap Devices and Peripheral Ports 1 SR 12 PG V CC EN OCP PG V IN NC 2 11 OCP 13: V OUT Thermal Bandgap V 3 10 V Control OUT SS Shutdown, & Logic UVLO, & Biases V V 4 9 CC IN OCP 14: V IN NC 5 8 EN Delay and NC 6 7 V IN Charge Slew Rate Pump (Top View) Control ORDERING INFORMATION SR V V SS OUT Device Package Shipping Figure 1. Block Diagram NCP45760IMN24RTWG DFN12 3000 / Tape & Reel Semiconductor Components Industries, LLC, 2018 1 Publication Order Number: January, 2021 Rev. 1 NCP45760/DNCP45760 Table 1. PIN DESCRIPTION Pin Name Function 1 SR Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND float if not used. 3,13 V Source of MOSFET connected to load. Pin 13 should be used for high current (>0.5 A) OUT 4,7,14 V Input voltage (3 V 24 V) Pin 14 should be used for high current (>0.5 A) IN 8 EN Activehigh digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND. 9 V Driver supply voltage (3.0 V 5.5 V) CC 10 V Driver ground SS 11 OCP Overcurrent protection trip point adjustment made with a voltage applied (0 V 1.2 V), pin has an internal pull up resistor to EN short to ground if overcurrent protection is not needed. 12 PG Activehigh, opendrain output that indicates when the gate of the MOSFET is fully charged, external pull up resistor 100 k to an external voltage source required tie to GND if not used. Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage Range V 0.3 to 6 V CC Input Voltage Range V 0.3 to 30 V IN Output Voltage Range V 0.3 to 30 V OUT EN Input Voltage Range V GND0.3 to (V + 0.3) V EN CC PG Output Voltage Range (Note 1) V 0.3 to 6 V PG OCP Input Voltage Range V 0.3 to 6 V OCP Thermal Resistance, JunctiontoAmbient, Steady State (Note 2) R 28.6 C/W JA Thermal Resistance, JunctiontoCase (V Paddle) R 1.7 C/W IN JC Continuous MOSFET Current T = 25C (Note 2) I 8 A A MAX Total Power Dissipation T = 25C (Note 2) P 3.49 W A D Derate above T = 25C 34.9 mW/C A Storage Temperature Range T 55 to 150 C STG Lead Temperature, Soldering (10 sec.) T 260 C SLD ESD Capability, Human Body Model (Notes 3 and 4) ESD 2 kV HBM ESD Capability, Charged Device Model (Notes 3 and 4) ESD 0.5 kV CDM Latchup Current Immunity (Note 3) LU 100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. PG is an open drain output that requires an external pullup resistor > 100 k to an external voltage source. 2. Surfacemounted on FR4 board using the minimum recommended pad size, 1 oz Cu. 3. Tested by the following methods T = 25C: A ESD Human Body Model tested per JS001 ESD Charged Device Model per ESD JS 002 Latchup Current tested per JESD78 PG, OCP, and SR pins must be connected correctly for compliance. 4. Rating is for all pins except for V and V which are tied to the internal MOSFETs Drain and Source. Typical MOSFET ESD performance IN OUT for V and V should be expected and these devices should be treated as ESD sensitive. IN OUT www.onsemi.com 2