NCP5208 DDRI/II Termination Regulator The NCP5208 is a linear regulator specifically designed for the active termination of DDRI/II SDRAM. The device can be operated from a single supply voltage as low as 1.7 V. For DDRI applications, the device is capable of sourcing and sinking current up NCP5208 VDDQ AVIN PVIN VDDQ AVIN PVIN AVIN R POK + M0 EN VTT SD VTT EN + R/50 AVIN C OUT M1 EN R VFB GND Figure 2. Simplified Functional Block Diagram PIN FUNCTION DESCRIPTION Pin Symbol Description 1 POK Opendrain VTT Power OK output 2 GND Ground 3 VFB Remote sensing Feedback pin for regulating VTT 4 SD Active low shutdown pin to tristate VTT output, this pin is pulled high internally 5 VDDQ Reference input for VTT regulator 6 AVIN Analog supply input, this powers all the internal control circuitry 7 PVIN Power supply input, this provides the rail voltage for the VTT output 8 VTT Termination Regulator output MAXIMUM RATINGS Rating Symbol Value Unit AVIN, PVIN, VDDQ, VFB, VTT to GND 0.3, 6.0 V Input/Output Pins SD V 0.3, 6.0 V IO Open Drain Output Pins POK V 0.3, 6.0 V POK Thermal Characteristics R 151 C/W JA T SOIC8 Package Thermal Resistance, JunctiontoAir Operating Junction Temperature Range T 10 to +150 C J Operating Ambient Temperature Range T 0 to +70 C A Storage Temperature Range T 55 to +150 C stg Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22A114. Machine Model (MM) 200 V per JEDEC standard: JESD22A115. 2. Latchup Current Maximum Rating: 150 mA per JEDEC standard: JESD78.