DATA SHEET www.onsemi.com Linear Voltage Regulator - Bias Rail, Very Low Dropout, Programmable QFN20 CASE 485DB Soft-Start 3 A PIN CONNECTIONS NCV59744 5 4 3 2 1 The NCV59744 is dualrail very low dropout voltage regulator that IN 6 20 OUT IN 7 19 OUT is capable of providing an output current in excess of 3.0 A with a IN 8 GND 18 OUT dropout voltage of 115 mV typ. at full load current. The devices are PG 9 17 NC stable with ceramic and other low ESR output capacitors. This series 10 16 BIAS FB contains adjustable output voltage version with output voltage down 11 12 13 14 15 to 0.8 V. Internal protection features consist of builtin thermal shutdown and output current limiting protection. Userprogrammable SoftStart and Power Good pins are available. The NCV59744 is QFN20, 5x5, 0.65P available in QFN205x50.65P package. Features MARKING DIAGRAM Output Current in Excess of 3.0 A 1 0.25% Typical Accuracy Over Line and Load V Range: 0.8 V to 5.5 V IN NCV59744 AWLYYWW V Range: 2.2 V to 5.5 V BIAS Output Voltage Range: 0.8 V to 3.6 V Dropout Voltage: 115 mV at 3 A QFN20 Programmable Soft Start A = Assembly Location Open Drain Power Good Output L/WL = Wafer Lot Excellent Transient Response Y/YY = Year W/WW = Work Week Current Limit and Thermal Shutdown Protection = PbFree Package NCV Prefix for Automotive and Other Applications Requiring (Note: Microdot may be in either location) Unique Site and Control Change Requirements AECQ100 Qualified and PPAP Capable These are PbFree Devices ORDERING INFORMATION See detailed ordering, marking and shipping information in the Applications package dimensions section on page 10 of this data sheet. Automotive, Telecom and Industrial Equipment Point of Load Regulation FPGA, DSP and Logic Power Supplies Switching Power Supply Post Regulation Applications with Specific Startup Time or Sequencing Requirements NCV59744 Figure 1. Typical Application Schematic Semiconductor Components Industries, LLC, 2017 1 Publication Order Number: November, 2021 Rev. 2 NCV59744/D EN IN GND NC NC NC NC NC SS OUTNCV59744 0.45 A Figure 2. Simplified Schematic Block Diagram Table 1. PIN FUNCTION DESCRIPTION Name QFN20 Description IN 58 Unregulated input to the device. EN 11 Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. This pin must not be left floating. SS 15 SoftStart pin. A capacitor connected on this pin to ground sets the startup time. If this pin is left floating, the regulator output softstart ramp time is typically 200 s. BIAS 10 Bias input voltage for error amplifier, reference, and internal control circuits. PG 9 PowerGood (PG) is an opendrain, activehigh output that indicates the status of V . When V OUT OUT exceeds the PG trip threshold, the PG pin goes into a highimpedance state. When V is below this OUT threshold the pin is driven to a lowimpedance state. A pullup resistor from 10 k to 1 M should be connected from this pin to a supply up to 5.5 V. The supply can be higher than the input voltage. Alternatively, the PG pin can be left floating if output monitoring is not necessary. FB 16 This pin is the feedback connection to the center tap of an external resistor divider network that sets the output voltage. This pin must not be left floating. OUT 1, 1820 Regulated output voltage. It is recommended that the output capacitor 2.2 F. NC 24, 13, 14, 17 No connection. This pin can be left floating or connected to GND to allow better thermal contact to the topside plane. GND 12 Ground PAD/TAB Should be soldered to the ground plane for increased thermal performance www.onsemi.com 2