NLX2G32CMX1TCG ON Semiconductor

NLX2G32 Dual 2-Input OR Gate The NLX2G32 is a high performance dual 2input OR Gate operating from a 1.65 V to 5.5 V supply. Features Extremely High Speed: t 2.5 ns (typical) at V = 5 V PD CC NLX2G32 MAXIMUM RATINGS Symbol Parameter Value Unit V DC Supply Voltage 0.5 to 7.0 V CC V DC Input Voltage 0.5 to 7.0 V I V DC Output Voltage 0.5 to 7.0 V O I DC Input Diode Current V < GND 50 mA IK I I DC Output Diode Current V < GND 50 mA OK O I DC Output Sink Current 50 mA O I DC Supply Current per Supply Pin 100 mA CC I DC Ground Current per Ground Pin 100 mA GND T Storage Temperature Range 65 to 150 C STG T Lead Temperature, 1 mm from Case for 10 Seconds 260 C L T Junction Temperature under Bias 150 C J Thermal Resistance (Note 1) 250 C/W JA P Power Dissipation in Still Air at 85C 250 mW D MSL Moisture Sensitivity Level 1 F Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in R V ESD Withstand Voltage Human Body Model (Note 2) > 2000 V ESD Machine Model (Note 3) > 200 Charged Device Model (Note 4) N/A I LatchUp Performance Above V and Below GND at 85C (Note 5) 500 mA LatchUp CC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mmby1 inch, 2ounce copper trace with no air flow. 2. Tested to EIA/JESD22A114 A. 3. Tested to EIA/JESD22A115 A. 4. Tested to JESD22C101A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V Supply Voltage Operating 1.65 5.5 V CC Data Retention Only 1.5 5.5 V Input Voltage (Note 6) 0 5.5 V I V Output Voltage (HIGH or LOW State) 0 V V O CC T Operating FreeAir Temperature 40 85 C A t/ V Input Transition Rise or Fall Rate V = 1.8 V 0.15 V 0 20 ns/V CC V = 2.5 V 0.2 V 0 20 CC V = 3.0 V 0.3 V 0 10 CC V = 5.0 V 0.5 V 0 5 CC 6. Unused inputs may not be left open. All inputs must be tied to a highlogic voltage level or a lowlogic input voltage level.