5962-8757702RA Renesas

TM 82C87H March 1997 CMOS Octal Inverting Bus Transceiver Features Description Full Eight Bit Bi-Directional Bus Interface The Intersil 82C87H is a high performance CMOS Octal Transceiver manufactured using a self-aligned silicon gate Industry Standard 8287 Compatible Pinout CMOS process (Scaled SAJI IV). The 82C87H provides a full High Drive Capability eight-bit bi-directional bus interface in a 20 pin package. The Transmit (T) control determines the data direction. The active -B Side I 20mA OL low output enable (OE) permits simple interface to the -A Side I 12mA OL 80C86, 80C88 and other microprocessors. The 82C87H has Three-State Inverting Outputs gated inputs, eliminating the need for pull-up/pull-down resis- tors and reducing overall system operating power dissipation. Propagation Delay . 35ns Max. The 82C87H provides inverted data at the outputs. Gated Inputs Ordering Information - Reduce Operating Power - Eliminate the Need for Pull-Up Resistors PART NUMBERS PACK- PKG. Single 5V Power Supply 5MHz 8MHz AGE TEMP. RANGE NO. o o CP82C87H-5 CP82C87H 20 Ld 0 C to +70CE20.3 Low Power Operation . ICCSB = 10A PDIP o o IP82C87H-5 IP82C87H -40 C to +85 CE20.3 Operating Temperature Range o o o o - C82C87H . 0 C to +70 C CS82C87H-5 CS82C87H 20 Ld 0 C to +70CN20.35 o o PLCC - I82C87H -40 C to +85 C o o IS82C87H-5 IS82C87H -40 C to +85 CN20.35 o o - M82C87H -55 C to +125 C o o CD82C87H-5 CD82C87H 20 Ld 0 C to +70CF20.3 CERDIP o o ID82C87H-5 ID82C87H -40 C to +85 CF20.3 o MD82C87H-5/B - -55 C to F20.3 o +125 C 5962- - SMD F20.3 8757702RA o MR82C87H-5/B - 20 Pad -55 C to J20.A o CLCC +125 C 5962- -SMD J20.A 87577022A CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. FN2978.1 1-888-INTERSIL or 321-724-7143 Intersil (and design) is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2002. All Rights Reserved 32582C82C8787HH Pinouts 82C87H (PDIP, CERDIP) 82C87H (PLCC, CLCC) TRUTH TABLE TOP VIEW TOP VIEW TOE AB X H Hi-Z Hi-Z A0 1 20 V CC HL I O 3 2 1 20 19 A1 2 19 B0 LL O I A2 3 18 B1 A3 4 17 B2 A3 4 18 B1 H = Logic One L = Logic Zero A4 5 16 B3 A4 5 17 B2 I = Input Mode A5 6 15 B4 O = Output Mode A5 6 16 B3 A6 7 14 B5 X = Dont Care A6 7 15 B4 Hi-Z = High Impedance 8 A7 13 B6 A7 8 14 B5 OE 9 12 B7 PIN NAMES GND 10 11 T PIN DESCRIPTION 9 10 11 12 13 A -A Local Bus Data I/O Pins 0 7 B -B System Bus Data I/O Pins 0 7 T Transmit Control Input OE Active Low Output Enable 326 A2 OE A1 GND A0 T V B7 CC B0 B6