HIGH-SPEED 3.3V IDT70V24S/L
4K x 16 DUAL-PORT
STATIC RAM
IDT70V24 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
True Dual-Ported memory cells which allow simultaneous
one device
reads of the same memory location
M/S = VIH for BUSY output flag on Master
High-speed access
M/S = VIL for BUSY input on Slave
Commercial: 15/20/25/35/55ns (max.)
BUSY and Interrupt Flag
Industrial: 20/25/35/55ns (max.)
On-chip port arbitration logic
Low-power operation
Full on-chip hardware support of semaphore signaling
IDT70V24S
between ports
Active: 400mW (typ.)
Fully asynchronous operation from either port
Standby: 3.3mW (typ.)
LVTTL-compatible, single 3.3V (0.3V) power supply
IDT70V24L
Available in 84-pin PGA, 84-pin PLCC and 100-pin TQFP
Active: 380mW (typ.)
Industrial temperature range (-40C to +85C) is available
Standby: 660 W (typ.)
for selected speeds
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
R/R
R/L
L R
L R
L R
L R
I/O8L-I/O15L
I/O8R-I/O15R
I/O I/O
Control Control
I/O -I/O
0R 7R
I/O0L-I/O7L
(1,2)
(1,2)
R
L
A
11L A11R
Address MEMORY Address
Decoder ARRAY Decoder
A0L
A
0R
12
12
ARBITRATION
INTERRUPT
L R
SEMAPHORE
L R
LOGIC
R/L R/R
R
L
(2)
(2)
M/
R
L
2911 drw 01
NOTES:
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.
2. BUSY outputs and INT outputs are non-tri-stated push-pull.
1
DSC-2911/8
2000 Integrated Device Technology, Inc.IDT70V24S/L
High-Speed 4K x 16 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
The IDT70V24 is a high-speed 4K x 16 Dual-Port Static RAM. The reads or writes to any location in memory. An automatic power down
IDT70V24 is designed to be used as a stand-alone 64K-bit Dual-Port RAM feature controlled by CE permits the on-chip circuitry of each port to enter
or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more a very low standby power mode.
word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach Fabricated using IDTs CMOS high-performance technology,
these devices typically operate on only 400mW of power.
in 32-bit or wider memory system applications results in full-speed, error-
free operation without the need for additional discrete logic. The IDT70V24 is packaged in a ceramic 84-pin PGA, an 84-Pin
This device provides two independent ports with separate control, PLCC and a 100-pin Thin Quad Flatpack.
address, and I/O pins that permit independent, asyn-chronous access for
!
INDEX
1110 9 8765 4 3 2 18483 82 81 80 79 78 77 76 75
I/O8L
12 74 A7L
9L 6L
I/O 13 73 A
10L
I/O 72 A5L
14
11L
I/O 71 4L
15 A
12L
I/O 70 A3L
16
I/O13L 2L
17 69 A
GND 68
18 A1L
I/O14L A0L
19 67
I/O15L 66
L
20
IDT70V24J
(4)
VCC L
J84-1 65
21
GND GND
64
22
84-Pin PLCC
I/O0R
(5) 63 M/
23
Top View
I/O1R
24 62 R
I/O2R 61
R
25
VCC 60 A0R
26
3R
I/O 59 1R
27 A
I/O4R A2R
28 58
I/O5R 3R
29 57 A
I/O6R 4R
30 56 A
I/O7R A5R
31 55
8R 32
I/O 54 A6R
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
2911 drw 02
Index
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1
N/C N/C
75
2 74
N/C N/C
N/C 3 73
N/C
N/C 4 72
N/C
I/O10L 5 71
A5L
I/O11L 6 70 A
4L
I/O12L 7 69 A3L
68
I/O13L 8 A2L
9 67
GND A1L
10 66
I/O14L A0L
IDT70V24PF
15L 11 65
I/O
L
(4)
PN100-1
VCC 12 64
L
GND 13 63
GND
100-Pin TQFP
62
I/O0R 14
(5) M/
Top View
61
I/O1R 15
R
60
I/O2R 16
R
59
VCC 17 A0R
58
I/O3R 18 A1R
I/O 57
4R 19 A2R
I/O5R 20 56
A3R
55
I/O6R 21
A4R
54
N/C 22 N/C
NOTES:
53
N/C 23 N/C
1. All VCC pins must be connected to power supply.
52
N/C 24 N/C
2. All GND pins must be connected to ground supply.
51
N/C 25 N/C
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
3. J84-1 package body is approximately 1.15 in x 1.15 in x .17 in.
PN100-1 package body is approximately 14mm x 14mm x 1.4mm. 2911 drw 03
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.422
9R
I/O
I/O7L
I/O10R
6L
I/O
I/O11R
I/O5L
I/O12R
I/O4L
I/O13R
I/O3L
I/O14R
I/O2L
GND
GND
I/O15R
I/O1L
R
I/O0L
R/R
L
GND
VCC
R
R/L
R
L
R
L
R
L
N/C
L
A11R
N/C
10R
A
A11L
A9R
A10L
A8R
9L
A
A7R
8L
A
9L
I/O7R I/O
I/O8L
I/O8R
I/O7L
I/O9R
I/O10R I/O6L
I/O11R I/O5L
I/O12R I/O4L
I/O13R I/O3L
I/O14R I/O2L
GND GND
I/O
I/O15R 1L
I/O0L
R
R/R L
VCC
GND
R/L
R
L
R
L
R
L
R
L
N/C
A11R N/C
A11L
A10R
A10L
A9R
A9L
A8R
7R A8L
A
6R A7L
A
A5R A6L