3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, IDT72V01, IDT72V02 2,048 x 9, 4,096 x 9, IDT72V03, IDT72V04 8,192 x 9, 16,384 x 9 IDT72V05, IDT72V06 LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: DESCRIPTION: 3.3V family uses less power than the 5 Volt 7201/7202/7203/7204/ The IDT72V01/72V02/72V03/72V04/72V05/72V06 are dual-port FIFO 7205/7206 family memories that operate at a power supply voltage (Vcc) between 3.0V and 3.6V. 512 x 9 organization (72V01) Their architecture, functional operation and pin assignments are identical to 1,024 x 9 organization (72V02) those of the IDT7201/7202/7203/7204/7205/7206. These devices load and 2,048 x 9 organization (72V03) empty data on a first-in/first-out basis. They use Full and Empty flags to prevent 4,096 X 9 organization (72V04) data overflow and underflow and expansion logic to allow for unlimited 8,192 x 9 organization (72V05) expansion capability in both word size and depth. 16,384 X 9 organization (72V06) The reads and writes are internally sequential through the use of ring Functionally compatible with 720x family pointers, with no address information required to load and unload data. Data Low-power consumption is toggled in and out of the devices through the use of the Write (W) and Read Active: 180 mW (max.) (R) pins. The devices have a maximum data access time as fast as 25 ns. Power-down: 18 mW (max.) The devices utilize a 9-bit wide data array to allow for control and parity bits 15 ns access time at the users option. This feature is especially useful in data communications Asynchronous and simultaneous read and write applications where it is necessary to use a parity bit for transmission/reception Fully expandable by both word depth and/or bit width error checking. They also feature a Retransmit (RT) capability that allows for Status Flags: Empty, Half-Full, Full reset of the read pointer to its initial position when RT is pulsed LOW to allow for Auto-retransmit capability retransmission from the beginning of data. A Half-Full Flag is available in the Available in 32-pin PLCC single device mode and width expansion modes. Industrial temperature range (40C to +85C) is available These FIFOs are fabricated using high-speed CMOS technology. It has Green parts available, see ordering information been designed for those applications requiring asynchronous and simultane- ous read/writes in multiprocessing and rate buffer applications. FUNCTIONAL BLOCK DIAGRAM DATA INPUTS (D0-D8) WRITE W CONTROL RAM ARRAY WRITE READ 512 x 9 POINTER POINTER 1,024 x 9 2,048 x 9 4,096 x 9 8,192 x 9 16,384 x 9 THREE- STATE RS BUFFERS DATA OUTPUTS READ (Q0-Q8) RESET R CONTROL LOGIC FLAG EF FL/RT LOGIC FF EXPANSION XI LOGIC XO/HF 3033 drw 01 IDT and the IDT logo are trademarks of Integrated Device Technology, Inc NOVEMBER 2017 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-3033/8IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO COMMERCIAL AND INDUSTRIAL 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9 TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol Rating Com l & Ind l Unit VTERM Terminal Voltage 0.5 to +7.0 V INDEX with Respect to GND TSTG Storage Temperature 55 to +125 C IOUT DC Output Current 50 to +50 mA 4 3 2 32 31 30 1 NOTE: D2 5 29 D6 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation D1 6 28 D7 of the device at these or any other conditions above those indicated in the operational D0 7 27 NC sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. XI 8 26 FL/RT FF RS 9 25 EF Q0 10 24 RECOMMENDED DC OPERATING Q1 11 23 XO/HF CONDITIONS NC 12 22 Q7 Symbol Rating Min. Typ. Max. Unit Q2 13 21 Q6 VCC Supply Voltage 3.0 3.3 3.6 V 14 15 16 17 18 19 20 GND Supply Voltage 0 0 0 V (1) VIH Input High Voltage 2.0 VCC+0.5 V (2) VIL Input Low Voltage 0.8 V 3033 drw 02b TA Operating Temperature Commercial 0 70 C TA Operating Temperature Industrial 40 85 C NOTES: PLCC (J32-1, order code: J) 1. For RT/RS/XI input, VIH = 2.6V (commercial). TOP VIEW For RT/RS/XI input, VIH = 2.8V (military). 2. 1.5V undershoots are allowed for 10ns once per cycle. DC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 3.3V 0.3V, TA = 0C to +70C Industrial: VCC = 3.3V 0.3V, TA = 40C to +85C) IDT72V01 IDT72V02 IDT72V03 IDT72V05 IDT72V04 IDT72V06 (1) (1) Commercial & Industrial Commercial & Industrial tA = 15, 25, 35 ns tA = 15, 25, 35 ns Symbol Parameter Min. Max. Min. Max. Unit (2) ILI Input Leakage Current (Any Input) 1 1 1 1 A (3) ILO Output Leakage Current 10 10 10 10 A VOH Output Logic 1 Voltage IOH = 2mA 2.4 2.4 V VOL Output Logic 0 Voltage IOL = 8mA 0.4 0.4 V (4,5) ICC1 Active Power Supply Current 60 75 mA (4,6) ICC2 Standby Current (R=W=RS=FL/RT=VIH) 55mA NOTES: 1. Industrial temperature range product for the 25ns speed grade is available as a standard device. All other speed grades are available by special order. 2. Measurements with 0.4 VIN VCC. 3. R VIH, 0.4 VOUT VCC. 4. Tested with outputs open (IOUT = 0). 5. Tested at f = 20 MHz. 6. All Inputs = VCC - 0.2V or GND + 0.2V. CAPACITANCE (TA = +25C, f = 1.0 MHz) (1) Symbol Parameter Condition Max. Unit CIN Input Capacitance VIN = 0V 8 pF COUT Output Capacitance VOUT = 0V 8 pF NOTE: 1. Characterized values, not currently tested. 2 D3 Q3 D8 Q8 GND W NC NC R VCC D4 Q4 D5 Q5