TM 3.3 VOLT CMOS SyncBiFIFO 8,192 x 36 x 2 IDT72V3672 Select IDT Standard timing (using EFA, EFB, FFA and FFB flags FEATURES functions) or First Word Fall Through timing (using ORA, ORB, IRA Memory storage capacity: and IRB flag functions) IDT72V3672 8,192 x 36 x 2 Available in space-saving 120-pin Thin Quad Flatpack (TQFP) Supports clock frequencies up to 100MHz Pin and functionally compatible versions of the 5V operating Fast access times of 6.5ns IDT23672 Free-running CLKA and CLKB may be asynchronous or coincident Pin compatible to the lower density parts, IDT72V3642 (simultaneous reading and writing of data on a single clock edge Industrial temperature range (40C to +85C) is available is permitted) Green parts available, see ordering information Two independent clocked FIFOs buffering data in opposite direc- tions DESCRIPTION Mailbox bypass register for each FIFO Programmable Almost-Full and Almost-Empty flags The IDT72V3672 is a pin and functionally compatible version of the Microprocessor Interface Control Logic IDT723672, designed to run off a 3.3V supply for exceptionally low-power FFA/IRA, EFA/ORA, AEA, and AFA flags synchronized by CLKA consumption. These devices are monolithic, high-speed, low-power, CMOS FFB/IRB, EFB/ORB, AEB, and AFB flags synchronized by CLKB Bidirectional SyncFIFO (clocked) memories which support clock frequencies FUNCTIONAL BLOCK DIAGRAM MBF1 Mail 1 Register CLKA CSA Port-A Control W/RA Logic ENA RAM MBA ARRAY 8,192 x 36 36 FIFO1, Mail1 RST1 Reset Logic Write Read Pointer Pointer 36 Status Flag EFB/ORB FFA/IRA Logic AFA AEB FIFO 1 FS0 Programmable Flag Timing FWFT FS1 Offset Registers Mode A0 - A35 13 B0 - B35 FIFO 2 Status Flag EFA/ORA FFB/IRB Logic AEA AFB 36 Read Write Pointer Pointer 36 FIFO2, Mail2 RST2 Reset Logic RAM ARRAY CLKB 8,192 x 36 Port-B CSB Control W/RB Logic ENB Mail 2 MBB Register 4660 drw01 MBF2 IDT and the IDT logo are registered trademark of Integrated Device Technology, Inc. SyncBiFIFO is a trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE APRIL 2017 11 2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-4660/6 Input Output Register Register Output Input Register RegisterTM IDT72V3672 3.3V CMOS SyncBiFIFO 8,192 x 36 x 2 COMMERCIAL TEMPERATURE RANGE to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for DESCRIPTION (CONTINUED) each port are independent of one another and can be asynchronous or up to 100MHz and have read access times as fast as 6.5ns. Two independent coincident. The enables for each port are arranged to provide a simple 8,192 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite bidirectional interface between microprocessors and/or buses with synchro- directions. Communication between each port may bypass the FIFOs via two nous control. 36-bit mailbox registers. Each mailbox register has a flag to signal when new These devices have two modes of operation: In the IDT Standard mode, mail has been stored. the first word written to an empty FIFO is deposited into the memory array. A These devices are a synchronous (clocked) FIFO, meaning each port read operation is required to access that word (along with all other words employs a synchronous interface. All data transfers through a port are gated residing in memory). In the First Word Fall Through mode (FWFT), the first PIN CONFIGURATION VCC 91 60 B11 CLKB 92 B10 59 ENB 93 B9 58 W/RB 94 57 B8 CSB 95 56 B7 GND 96 VCC 55 FFB/IRB 97 54 B6 EFB/ORB 98 53 GND AFB 99 B5 52 AEB 100 51 B4 VCC 101 50 B3 MBF1 102 B2 49 MBB 103 48 B1 72V3672 RST2 104 47 B0 FS1 105 46 GND GND 106 45 A0 FS0 107 44 A1 RST1 108 43 A2 MBA 109 42 VCC MBF2 110 41 A3 AEA 111 40 A4 AFA 112 39 A5 VCC 113 38 GND EFA/ORA 114 37 A6 FFA/IRA 115 36 A7 CSA 116 35 A8 W/RA 117 34 A9 ENA 118 33 A10 CLKA 119 32 A11 GND 120 31 GND 4660 drw03 NOTE: 1. Pin 1 identifier in corner. TQFP PNG120 (Order code: PF) TOP VIEW 2 90 B35 1 A35 89 B34 A34 2 88 B33 3 A33 87 B32 4 A32 86 GND VCC 5 85 B31 6 A31 84 B30 7 A30 83 B29 GND 8 82 B28 9 A29 81 B27 10 A28 80 B26 A27 11 79 VCC 12 A26 78 B25 A25 13 77 B24 A24 14 76 GND 15 A23 75 B23 FWFT 16 74 B22 A22 17 73 B21 VCC 18 72 B20 A21 19 71 B19 A20 20 70 B18 A19 21 69 GND A18 22 68 B17 23 GND 67 B16 A17 24 66 VCC A16 25 65 B15 26 A15 64 B14 A14 27 63 B13 A13 28 62 B12 29 VCC 61 GND A12 30