74ALVC16245PAG Renesas

IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74ALVC16245 BUS TRANSCEIVER WITH 3-STATE OUTPUTS DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS 0.5 MICRON CMOS Technology technology. The ALVC16245 is designed for asynchronous communication Typical tSK(o) (Output Skew) < 250ps between data buses. The control-function implementation minimizes external ESD > 2000V per MIL-STD-883, Method 3015 > 200V using timing requirements. machine model (C = 200pF, R = 0) This device can be used as two 8-bit transceivers or one 16-bit transceiver. VCC = 3.3V 0.3V, Normal Range It allows data transmission from the A bus to the B bus or from the B bus to the VCC = 2.7V to 3.6V, Extended Range A bus, depending on the logic level at the direction-control (DIR) input. The VCC = 2.5V 0.2V output-enable (OE) input can be used to disable the device so that the buses CMOS power levels (0.4 W typ. static) are effectively isolated. Rail-to-Rail output swing for increased noise margin The ALVC16245 has been designed with a 24mA output driver. This driver Available in TSSOP package is capable of driving a moderate to heavy load while maintaining speed performance. DRIVE FEATURES: APPLICATIONS: High Output Drivers: 24mA 3.3V high speed systems Suitable for heavy loads 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 24 1DIR 2DIR 48 25 1OE 2OE 47 36 1A1 2A1 2 13 1B1 2B1 46 35 1A2 2A2 3 14 1B2 2B2 44 33 1A3 2A3 5 16 1B3 2B3 43 32 1A4 2A4 6 17 1B4 2B4 41 30 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 1B6 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 12 23 1B8 2B8 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JUNE 2009 1 2009 Integrated Device Technology, Inc. DSC-4604/6IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V 1DIR 1 48 1OE (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 2 1B1 47 1A1 TSTG Storage Temperature 65 to +150 C IOUT DC Output Current 50 to +50 mA 1B2 3 46 1A2 IIK Continuous Clamp Current, 50 mA 4 GND 45 VI < 0 or VI > VCC GND 5 IOK Continuous Clamp Current, VO < 0 50 mA 1B3 44 1A3 ICC Continuous Current through each 100 mA 6 1B4 1A4 43 ISS VCC or GND 7 VCC NOTES: 42 VCC 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 8 1B5 41 1A5 permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational 9 40 1B6 1A6 sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 10 GND 39 GND 2. VCC terminals. 3. All terminals except VCC. 11 1B7 38 1A7 12 1B8 37 1A8 CAPACITANCE (TA = +25C, F = 1.0MHz) (1) 13 2B1 36 2A1 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 5 7 pF 14 2B2 35 2A2 COUT Output Capacitance VOUT = 0V 7 9 pF 15 34 GND GND COUT I/O Port Capacitance VIN = 0V 7 9 pF 16 2B3 33 2A3 NOTE: 1. As applicable to the device type. 17 2B4 32 2A4 18 VCC 31 VCC 19 30 2B5 2A5 PIN DESCRIPTION 20 2B6 29 2A6 Pin Names Description GND 21 28 GND xOE Output Enable Inputs (Active LOW) 22 2B7 27 2A7 xDIR Direction Control Inputs 23 xAx Side A Inputs or 3-State Outputs 2B8 26 2A8 xBx Side B Inputs or 3-State Outputs 24 25 2DIR 2OE (1) FUNCTION TABLE (EACH 8-BIT SECTION) TSSOP TOP VIEW Inputs xOE xDIR Outputs L L Bus B Data to Bus A L H Bus A Data to Bus B HX Z NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2