82P33731/33831 Evaluation Board USER GUIDE Introduction The 82P33731/33831 evaluation board is designed to help the customer evaluate the IDT82P33731 and IDT82P33831 devices. This user guide will accomplish the following: Introduce the board on its power supply and jumper settings Describe the input and output connectors for normal operation How to bring up the board by using Timing Commander software GUI How to configure and program the board to generate standard-compliant frequencies Board Overview Use Figure 1 to identify various components of the board: Input and output SMA connectors Power supply jacks and some jumper settings necessary for the board operations. Detailed descriptions are as follows: Input SMA Connectors There are a total of 14 inputs, of which IN1, 2 are AMI inputs IN9, 10, 11, 12, 13, 14 are single-ended inputs IN3, 4, 5, 6, 7, 8 are differential inputs. Output SMA Connectors There are a total of 12 outputs, of which OUT1, 2, 7, 9, 10 are single-ended outputs OUT3, 4, 5, 6, 11, 12 are differential outputs OUT8 is an AMI output. USB connector Type-B connector for GUI communications. No power is drawn from USB connector other than to power the FTDI USB chip. Dip Switch SW6 Used to configure EEPROM write protection, master or slave selection and communication protocols 2 between PC/GUI and the board. For typical I C mode, set MPU MODE 1:0 = 00 ( I2C ON ). J76 This is a 2x12 pin header used to set communication mode between PC and the board. Table 1 shows how to jump the 2 header pairs for the intended mode. Use JP18 (described below) to set I C mode by default. Table 1: Jumper Setting on J76 FTDI SPI Aardvark SPI/I2C FTDI I2C Motherboard SPI/I2C FTDI UART FTDI to Aardvark 3-4 Jumper 1-3 Jumper 3-4 Jumper 3-5 Jumper 4-6 Jumper 1-2 Jumper 9-10 Jumper 7-9 Jumper 9-10 Jumper 9-11 Jumper 9-10 Jumper 7-8 Jumper 15-16 Jumper 13-15 Jumper 14-16 Jumper 15-17 Jumper 15-16 Jumper 13-14 Jumper 21-22 Jumper 19-21 Jumper 21-23 Jumper 19-20 Jumper 2 JP18 By default, I C mode will be selected with JP18 shunted (jumped). MARCH 6, 2019 1 2019 Integrated Device Technology, Inc.82P33731/33831 EVALUATION BOARD Figure 1. Board Overview APLL3 Crystals Crystals for APLL3 in the device. Three frequencies are supported 24.8832MHz, 25MHz and 25.78125MHz generating three different mode frequencies for SONET, Ethernet and Ethernet LAN, respectively. On the board, two crystals are installed and supported at the same time. OSCI input and XO System reference clock input. Refer to JP9 for clock source selection. The frequency of this input clock is selected by XO FREQ 2:0 pins described in SW5. HW Reset button Pressing this button will reset the device to default condition. JP9 3-pin header used to select the system reference clock to be from OSCI or XO. Please see board silkscreen for source selection. Dip Switch SW5 This dip switch contains the following bit configurations: System clock frequency selection switch the 3 bits to match OSCI frequency. Default frequency is 12.8MHz. Table 2: OSCI frequency Selections by SW5 XO FREQ 2:0 000 001 010 011 100 101 110 111 Osc Frequency (MHz) 10.0 12.8 13.0 19.44 20.0 24.576 25.0 30.72 SONET/SDH selection: This bit determines the value of IN SONET SDH during reset. 2 I C address bits: I2C AD 2:1 sets the lower 3-bit address of 7-bit I2C address with the least significant bit, I2C AD0 2 being ignored. Higher 4 bits is fixed at 4 b1010. This only applies to I C mode (MPU MODE 1:0 = 00 in SW6). AC/DC Power Jack Using a wall adapter AC/DC power supply (output 5VDC/3A with center-positive jack) can power the board, if 5VDC Power Jack is not supplied with a 5VDC power source. 2 MARCH 6, 2019