DATASHEET EL1881 FN7018 Rev 2.00 Sync Separator, Low Power September 15, 2011 The EL1881 video sync separator is manufactured using Features Elantecs high performance analog CMOS process. This NTSC, PAL, SECAM, non-standard video sync separation device extracts sync timing information from both standard and non-standard video input. It provides composite sync, Fixed 70mV slicing of video input levels from 0.5V to P-P vertical sync, burst/back porch timing, and odd/even field 2V P-P detection. Fixed 70mV sync tip slicing provides sync edge Low supply current - 1.5mA typ. detection when the video input level is between 0.5V and P-P Single +5V supply -2V (sync tip amplitude 143mV to 572mV). A single P-P external resistor sets all internal timing to adjust for various Composite, vertical sync output video standards. The composite sync output follows video in Odd/even field output sync pulses and a vertical sync pulse is output on the rising edge of the first vertical serration following the vertical Burst/back porch output pre-equalizing string. For non-standard vertical inputs, a Available in 8 Ld PDIP and SOIC packages default vertical pulse is output when the vertical signal stays Pb-free available (RoHS Compliant) low for longer than the vertical sync default delay time. The odd/even output indicates field polarity detected during the Applications vertical blanking interval. The EL1881 is plug-in compatible with the industry-standard LM1881 and can be substituted Video amplifiers for that part in 5V applications with lower required supply PCMCIA applications current. A/D drivers The EL1881 is available in the 8 Ld PDIP and SOIC packages and is specified for operation over the full -40C to Line drivers +85C temperature range Portable computers High-speed communications Pinout EL1881 RGB applications (8 LD PDIP, SOIC) Broadcast equipment TOP VIEW Active filtering V 5V COMPOSITE SYNC OUT 1 8 DD COMPOSITE VIDEO IN ODD/EVEN OUTPUT Demo Board 2 7 A dedicated demo board is available. VERTICAL SYNC OUT 3 6 R SET BUST/BACK GND 4 5 PORCH OUTPUT FN7018 Rev 2.00 Page 1 of 13 September 15, 2011EL1881 Pin Descriptions PIN NUMBER PIN NAME PIN FUNCTION 1 Composite Sync Composite sync pulse output sync pulses start on a falling edge and end on a rising edge Out 2 Composite Video AC coupled composite video input sync tip must be at the lowest potential (positive picture phase) In 3 Vertical Sync Out Vertical sync pulse output the falling edge of vert sync is the start of the vertical period 4 GND Supply ground 5 Burst/Back Porch Burst/back porch output low during burst portion of composite video Output 6R (Note 1) An external resistor to ground sets all internal timing a 681k 1% resistor will provide correct timing for SET NTSC signals 7 Odd/Even Output Odd/even field output high during odd fields, low during even fields transitions occur at start of vert sync pulse 8 VDD 5V Positive supply (5V) NOTE: 1. R must be a 1% resistor SET Ordering Information PART NUMBER PART MARKING PACKAGE PKG. DWG. EL1881CN EL1881CN 8 Ld PDIP E8.3 EL1881CS 1881CS 8 Ld SOIC M8.15E EL1881CS-T7 (Note 2) 1881CS 8 Ld SOIC (Tape & Reel) M8.15E EL1881CSZ (Notes 3, 4) 1881CSZ 8 Ld SOIC (Pb-free) M8.15E EL1881CSZ-T7 (Notes 2, 3, 4) 1881CSZ 8 Ld SOIC (Pb-free, Tape & Reel) M8.15E EL1881CSZ-T13 (Notes 2, 3, 4)) 1881CSZ 8 Ld SOIC (Pb-free, Tape & Reel) M8.15E NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020. 4. For Moisture Sensitivity Level (MSL), please see device information page for EL1881. For more information on MSL, please see Technical Brief TB363. FN7018 Rev 2.00 Page 2 of 13 September 15, 2011