EVK9FGV1004 Renesas

9FGV1001, 9FGV1002, and 9FGV1004 User Guide PhiClock PCIe Evaluation Board Introduction The evaluation board is designed to help the customer evaluate the 9FGV1001, 9FGV1002, and 9FGV1004 devices. When the board is connected to a PC running IDT Timing Commander software through USB, the device can be configured and programmed to generate different combinations of frequencies. Board Overview Use Figure 1 and Table 1 to identify: power supply jacks, USB connector, input and output frequency SMA connectors. Figure 1. Evaluation Board Overview 8 9 10 10 7 11 6 12 13 1 2 3 4 5 2018 Integrated Device Technology, Inc. 1 March 1, 20189FGV1001, 9FGV1002, and 9FGV1004 PhiClock PCIe Evaluation Board User Guide Table 1. Evaluation Board Pins and Functions Label Number Name On-board Connector Label Function 2 Alternative I C interface connector for Aardvark. 2 1I C Interface Connector J2 IDT Timing Commander can also use Aardvark. Connect this USB to your PC to run IDT Timing Commander. 2 USB Connector J6 The board can be powered from the USB port. Connect to 1.8V, 2.5V or 3.3V for the output voltage of 3 Output Power Supply Jack J3 the device. Connect to 1.8V, 2.5V or 3.3V for the core voltage of the 4 Core Power Supply Jack J4 device. 5 Ground Jack J5 Connect to ground of power supply. Can be a differential pair, or two single-ended outputs. 6 Differential Output 1 S7 and S10 Available logic types: LVCMOS, LVDS and LP-HCSL. Can be a differential pair, or two single-ended outputs. 7 Differential Output 2 S6 and S9 Available logic types: LVCMOS, LVDS and LP-HCSL. Can be a differential pair, or two single-ended outputs. 8 Differential Output 3 S5 and S8 Available logic types: LVCMOS, LVDS and LP-HCSL. 9 Reference Output 0 S1 Reference or buffered output from the crystal. VDD REFP1, VDDO 0, VDDO 1, four-way headers Power Supply Voltage used to select a power supply voltage. Connect the 10 E1, E2, E3, E4, E5, E6 Selector center pin to one of the 4 surrounding pins to select a voltage or a source. 11 Reference Output 1 S2 Reference or buffered output from the crystal. Can be a differential pair, or two single-ended outputs. 12 Differential Output 0 S3 and S4 Available logic types: LVCMOS, LVDS and LP-HCSL. Used to control certain pins like OEA, OEB, SEL0, SEL1 13 DIP Switch U2 2 and I C versus Hardware Select mode. Board Power Supply The evaluation board uses jumpers E1E6 to set the power supply voltages for various V pins. The 4-way jumpers can select 3 DD different voltages from regulators that use power from the USB port. Selection 2 is the jack for connecting a bench power supply. E1: Power supply for the REF outputs. The E1 voltage also determines the LVCMOS output levels of the REF0 and REF1 outputs. E2: Power supply for the OUT0 output driver. E3: Power supply for the OUT1 output driver. E4: Power supply for the analog (V ) and digital (V ) core V pins. DDA DDD DD E5: Power supply for the OUT2 output driver. E6: Power supply for the OUT3 output driver. See 9FGV100x Evaluation Board Schematics (Figure 5Figure 8) for detailed information. 2018 Integrated Device Technology, Inc. 2 March 1, 2018