F1975EVS Renesas

6-Bit, 75 Digital Step Attenuator F1975 5MHz to 3GHz Datasheet Description Features The F1975 Digital Step Attenuator (DSA) is a product in IDTs Frequency: 5MHz to 3000MHz TM Glitch-Free DSA Family, which is optimized for the demanding Serial and 6-bit parallel interface requirements of CATV and satellite systems. It operates in the 31.5dB control range frequency range of 5MHz to 3000MHz. This device is offered in a 0.5dB step compact 4mm 4mm, 20-pin Thin QFN package with a 75 TM Glitch-Free technology, low transient overshoot impedance for ease of integration. 3.0V to 5.25V supply 1.8V or 3.3V control logic Attenuator step error: 0.1dB at 1GHz Advantages Low insertion loss: 1.2dB at 1GHz Digital step attenuators are used in receivers and transmitters to Ultra-linear IIP3: +64dBm provide gain control. The F1975 is a 6-bit step attenuator optimized for these demanding applications. The silicon design has very low IIP2: +125dBm typical insertion loss and low distortion (+64dBm IIP3). The device has Stable integral non-linearity over temperature pinpoint attenuation accuracy. Most importantly, the F1975 Low current consumption: 550A typical TM includes IDTs Glitch-Free technology, which results in low over- Bi-directional shoot and ringing during most significant bit (MSB) transitions. Operating temperature: -40C to +105C TM Glitch-Free technology protects the power amplifier or 4mm 4mm, 20-pin QFN package analog-to-digital converter (ADC) from damage during transitions between attenuation states Extremely accurate attenuation levels Ultra-low distortion Block Diagram Low insertion loss for best signal-to-noise ratio (SNR) Figure 1. Block Diagram Typical Applications TM Glitch-Free CATV infrastructure CATV set-top boxes CATV satellite modems RF2 RF1 Data network equipment Fiber networks SPI Decoder Bias 2017 Integrated Device Technology, Inc. 1 Rev 1 September 21, 2017 V DD V MODE D 5:0 DATA CLK LEF1975 Datasheet Pin Assignments Figure 2. Pin Assignments for 4mm 4mm 0.75mm, 20-pin QFN Package Top View (Through Package) 20 19 18 17 16 15 D5 1 D4 RF1 2 14 RF2 3 13 DATA Exposed Pad V MODE 12 4 CLK NC 5 11 LE GND 6 7 8 9 10 2017 Integrated Device Technology, Inc. 2 Rev 1 September 21, 2017 V DD D0 D1 NC NC NC NC D2 GND D3