DATASHEET HIP2122, HIP2123 FN7670 Rev 0.00 100V, 2A Peak, High Frequency Half-Bridge Drivers with Rising Edge Delay Timer December 23, 2011 The HIP2122 and HIP2123 are 100V, high frequency, half- Features bridge MOSFET driver ICs. They are based on the popular 9 Ld TDFN B Package Compliant with 100V Conductor ISL2100A and ISL2101A half-bridge drivers. Like the Spacing Guidelines per IPC-2221 ISL2100A, two logic inputs, LI and HI, control both bridge outputs, LO and HO. All logic inputs are V tolerant. Break-Before-Make Dead-Time Prevents Shoot-through and DD is adjustable up to 220ns These drivers have a programmable dead-time to insure Bootstrap Supply Max Voltage to 114VDC break-before-make operation between the high-side and low- side drivers. The dead-time is adjustable up to 220ns. The Wide Supply Voltage Range (8V to 14V) internal logic does not prevent both outputs from turning on Supply Undervoltage Protection simultaneously if both inputs are high simultaneously for a time greater than the programmed delay. CMOS Compatible Input Thresholds with Hysteresis (HIP2122) A single PWM logic input controls both bridge outputs (HO, LO). 1.6 /1 Typical Output Pull-up/Pull-down Resistance An enable pin (EN), when low, drives both outputs to a low state. All logic inputs are V tolerant and the HIP2122 has DD On-Chip 1 Bootstrap Diode CMOS inputs with hysteresis for superior operation in noisy environments. Applications The HIP2122 has hysteretic inputs with thresholds that are Telecom Half-Bridge DC/DC Converters proportional to V . The HIP2123 has 3.3V logic/TTL DD UPS and Inverters compatible inputs. Motor Drives Two package options are provided. The 10 lead 4x4 DFN Class-D Amplifiers package has standard pinouts. The 9 lead 4x4 DFN package Forward Converter with Active Clamp omits pin 2 to comply with 100V conductor spacing per IPC- 2221. Related Literature FN7668, HIP2120, HIP2121 100V, 2A Peak, High Frequency Half-Bridge Drivers with Adjustable Dead Time Control and PWM Input 200 160 HALF 100V MAX 140 BRIDGE HIP2122, HIP2123 120 VDD HB 100 HI 80 SECONDARY HO CIRCUITS PWM LI 60 CONTROLLER HS RDT FEEDBACK 40 WITH VSS LO ISOLATION EPAD 20 81624324048566480 RDT (k) FIGURE 1. TYPICAL APPLICATION FIGURE 2. DEAD-TIME vs TIMING RESISTOR FN7670 Rev 0.00 Page 1 of 16 December 23, 2011 NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc DEADTIME (ns)HIP2122, HIP2123 Block Diagram VDD HB HIP2122, UNDER HO LEVEL VOLTAGE SHIFT HIP2123 HS HIP2122 HIP2122/23 HO DELAY UNDER RDT VOLTAGE OPTIONAL INVERSION FOR FUTURE PART NUMBERS LO LO DELAY EPAD IS HIP2122 HIP2122/23 ELECTRICALLY VSS ISOLATED EPAD Pin Configurations HIP2122, HIP2123 HIP2122, HIP2123 (10 LD 4X4 TDFN) (9 LD 4X4 TDFN) TOP VIEW TOP VIEW VDD 1 10 LO VDD 1 10 LO HB 2 9 VSS 9 VSS EPAD EPAD HO 3 8 LI HB 3 8 LI HS 4 7 HI HO 4 7 HI NC 5 6 RDT HS 5 6 RDT FN7670 Rev 0.00 Page 2 of 16 December 23, 2011