DATASHEET HS-3182 FN2963 Rev 3.00 ARINC 429 Bus Interface Line Driver Circuit May 30, 2008 The HS-3182 is a monolithic dielectric ally isolated bipolar Features differential line driver designed to meet the specifications of RoHS/Pb-free Available for SBDIP Package (100% Gold ARINC 429. This device is intended to be used with a Termination Finish) companion chip, HS-3282 CMOS ARINC Bus Interface Circuit, which provides the data formatting and processor TTL and CMOS Compatible Inputs interface function. Adjustable Rise and Fall Times via Two External Capacitors All logic inputs are TTL and CMOS compatible. In addition to the DATA (A) and DATA (B) inputs, there are also inputs for Programmable Output Differential Voltage via V Input REF CLOCK and SYNC signals which are ANDd with the DATA Operates at Data Rates Up to 100k Bits/s inputs. This feature enhances system performance and allows the HS-3182 to be used with devices other than the Output Short Circuit Proof and Contains Overvoltage HS-3182. Protection Outputs are Inhibited (0V) If DATA (A) and DATA (B) Three power supplies are necessary to operate the HS-3182: Inputs are Both in the Logic One State +V = +15V 10%, -V = -15V 10%, and V1 = 5V 5%. V is REF used to program the differential output voltage swing such that DATA (A) and DATA (B) Signals are ANDd with Clock V (DIFF) = 2VREF. Typically, V = V1 = 5V 5%, but a OUT REF and Sync Signals separate power supply may be used for VREF which should Full Military Temperature Range not exceed 6V. Pinouts The driver output impedance is 75 20% at +25C. Driver output rise and fall times are independently programmed HS-3182 (16 LD SBDIP) through the use of two external capacitors connected to the CA TOP VIEW and CB inputs. Typical capacitor values are CA = CB = 75pF for high-speed operation (100kBPS), and CA = CB = 300pF for V 1 16 V REF 1 low-speed operation (12kBPS to 14.5kBPS). The outputs are GND 2 15 NC protected against overvoltage and short circuit as shown in the SYNC 3 14 CLK Block Diagram. The HS-3182 is designed to operate over an DATA (A) 4 13 DATA (B) ambient temperature range of -55C to +125C, or -40C to C 5 12 C A B +85C. A 6 11 B OUT OUT TABLE 1. TRUTH TABLE -V 7 10 NC GND 8 9 +V SYNC CLK DATA (A) DATA (B) A B COMMENTS OUT OUT XL X X 0V 0V Null LX X X 0V 0V Null HS-3182 HH L L 0V 0V Null (28 LD CLCC) TOP VIEW HH L H -V +V Low REF REF HH H L +V -V High REF REF HH H H 0V 0V Null 4 3 2 1 28 27 26 NC 5 25 CLK 24 NC DATA (A) 6 NC 7 23 DATA (B) 22 CB NC 8 CA 9 21 NC NC 10 20 NC NC 11 19 NC 12 13 14 15 16 17 18 FN2963 Rev 3.00 Page 1 of 7 May 30, 2008 NC SYNC AOUT GND -V NC GND VREF +V V1 BOUT NC NC NCHS-3182 Ordering Information PART ORDERING PART TEMP. PKG. NUMBER NUMBER MARKING RANGE (C) PACKAGE DWG. HS1-3182-8 5962-8687901EA HS1-3182-8 RD -55 to +125 16 Ld SBDIP, Solder Seal (Pb-free) D16.3 HS1-3182-9+ HS1-3182-9+ HS1-3182-9+ RD -40 to +85 16 Ld SBDIP, Solder Seal (Pb-free) D16.3 HS4-3182-8 5962-86879013A HS4- 3182-8 RD -55 to +125 28 Ld TER CLCC, Solder Seal J28.A NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Block Diagram (9) (5) +V CA OUTPUT DRIVER (6) (4) F LEVEL SHIFTER A (A) DATA (A) AOUT AND SLOPE CONTROL (A) ROUT/2 (14) CLOCK (8) (1) VREF GND CL RL (3) OUTPUT SYNC DRIVER ROUT/2 FB LEVEL SHIFTER (B) (13) BOUT AND SLOPE DATA (B) CONTROL (B) (11) (16) V1 CURRENT (2) REGULATOR OVER-VOLTAGE -V CB PROTECTION (7) (12) Typical Application (9) PIN NUMBERS INDICATED BY ( ) +5V +15V CA CB (16) (1) (5) (12) V1 VREF C C +V (14) A B CLOCK (3) SYNC AOUT TO BUS (SEE NOTE) BOUT HS-3182 ARINC DRIVER CIRCUIT 31 (4) 429D0 DATA (A) 16 LEAD DIP HS-3282 CMOS ARINC CIRCUIT 32 (13) GND GND -V 429D0 DATA (B) (2) (8) (7) PIN NUMBER 10, 15 = NC -15V NOTE: The rise and fall time of the outputs are set to ARINC specified values by C and C . Typical C = C = 75pF for high speed and 300pF for A B A B low speed operation. The output HI and low levels are set to ARINC specifications by V . REF FN2963 Rev 3.00 Page 2 of 7 May 30, 2008