DATASHEET ISL12026, ISL12026A FN8231 Rev 9.00 Real Time Clock/Calendar with I2C Bus and EEPROM November 30, 2010 The ISL12026 and the ISL12026A devices are micro power Features real time clocks with timing and crystal compensation, Real Time Clock/Calendar clock/calender, power-fail indicator, two periodic or polled - Tracks Time in Hours, Minutes and Seconds alarms, intelligent battery backup switching, and integrated - Day of the Week, Day, Month and Year 512x8-bit EEPROM configured in 16 Bytes per page. - 3 Selectable Frequency Outputs The oscillator uses an external, low-cost 32.768kHz crystal. Two Non-Volatile Alarms The real time clock tracks time with separate registers for - Settable on the Second, Minute, Hour, Day of the Week, hours, minutes, and seconds. The device has calendar Day or Month registers for date, month, year and day of the week. The - Repeat Mode (Periodic Interrupts) calendar is accurate through 2099, with automatic leap year correction. Automatic Backup to Battery or SuperCap The ISL12026 and ISL12026A have different types of Power On-Chip Oscillator Compensation Control Settings. The ISL12026 uses the Legacy Mode - Internal Feedback Resistor and Compensation Setting, which follows conditions set in X1226 products. The Capacitors ISL12026A uses the Standard Mode Setting. Please refer to - 64 Position Digitally Controlled Trim Capacitor Power Control Operation on page 13 for more details. Also, - 6 Digital Frequency Adjustment Settings to 30ppm 2 please refer to I C Communications During Battery Backup 512x8 Bits of EEPROM on page 22 for important details. - 16-Byte Page Write Mode (32 total pages) Pinouts - 8 Modes of BlockLock Protection ISL12026, ISL12026A - Single Byte Write Capability (8 LD SOIC) High Reliability TOP VIEW - Data Retention: 50 years X1 V DD 1 8 - Endurance: >2,000,000 Cycles Per Byte X2 V 2 BAT 7 2 I C Interface SCL IRQ/F OUT 3 6 - 400kHz Data Transfer Rate GND SDA 4 5 800nA Battery Supply Current Package Options ISL12026, ISL12026A - 8 Ld SOIC and 8 Ld TSSOP Packages (8 LD TSSOP) Pb-Free (RoHS Compliant) TOP VIEW V BAT SCL 1 8 Applications V SDA DD 2 7 Utility Meters X1 GND 3 6 IRQ/F HVAC Equipment X2 OUT 4 5 Audio/Video Components Set-Top Box/Television Modems Network Routers, Hubs, Switches, Bridges Cellular Infrastructure Equipment Fixed Broadband Wireless Equipment Pagers/PDA POS Equipment Test Meters/Fixtures Office Automation (Copiers, Fax) Home Appliances Computer Products Other Industrial/Medical/Automotive FN8231 Rev 9.00 Page 1 of 24 November 30, 2010ISL12026, ISL12026A Ordering Information PART NUMBER PART V TRIP POINT BSW BIT DEFAULT TEMP RANGE PACKAGE PKG. BAT (Notes 1, 2, 3) MARKING (V) SETTING (C) (Pb-Free) DWG. ISL12026IBZ 12026 IBZ V < V BSW = 1 -40 to +85 8 Ld SOIC M8.15 DD BAT ISL12026IVZ 2026 IVZ V < V BSW = 1 -40 to +85 8 Ld TSSOP M8.173 DD BAT ISL12026AIBZ 12026A IBZ 2.2 BSW = 0 -40 to +85 8 Ld SOIC M8.15 ISL12026AIVZ 2026A IVZ 2.2 BSW = 0 -40 to +85 8 Ld TSSOP M8.173 NOTES: 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb- free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL12026, ISL12026A. For more information on MSL please see techbrief TB363. Block Diagram OSC COMPENSATION TIMER X1 TIME BATTERY V FREQUENCY 1Hz DD 32.768kHz OSCILLATOR SWITCH CALENDAR KEEPING DIVIDER CIRCUITRY V REGISTERS BAT X2 LOGIC (SRAM) IRQ/F OUT SELECT STATUS CONTROL/ CONTROL COMPARE SERIAL REGISTERS SCL REGISTERS ALARM DECODE INTERFACE (EEPROM) LOGIC (SRAM) DECODER ALARM REGS SDA (EEPROM) 8 4k EEPROM ARRAY Pin Descriptions PIN NUMBER SOIC TSSOP SYMBOL DESCRIPTION 1 3 X1 The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external 32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source (see Application Section on page 19.) 2 4 X2 The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external 32.768kHz quartz crystal (see Application Section on page 19.) 35 IRQ/F Interrupt Output/Frequency Output is a multi-functional pin that can be used as interrupt or frequency OUT output pin. The function is set via the control register. This output is an open drain configuration. 4 6 GND Ground. 5 7 SDA Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. 6 8 SCL The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on this pin is always active (not gated). 71 V This input provides a backup supply voltage to the device. V supplies power to the device in the event BAT BAT that the V supply fails. This pin should be tied to ground if not used. DD 82 V Power Supply. DD FN8231 Rev 9.00 Page 2 of 24 November 30, 2010 MASK