DATASHEET ISL23325 FN7870 Rev 1.00 Dual, 256-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP) September 23, 2015 The ISL23325 is a volatile, low voltage, low noise, low power, Features 256-Tap, dual digitally controlled potentiometer (DCP) with an 2 Two potentiometers per package I C Bus interface. It integrates two DCP cores, wiper switches and control logic on a monolithic CMOS integrated circuit. 256 resistor taps 10k 50k or 100k total resistance Each digitally controlled potentiometer is implemented with a 2 combination of resistor elements and CMOS switches. The I C serial interface 2 position of the wipers are controlled by the user through the I C - No additional level translator for low bus supply bus interface. Each potentiometer has an associated volatile - Three address pins allow up to eight devices per bus Wiper Register (WRi, i = 0, 1) that can be directly written to and read by the user. The contents of the WRi controls the position Maximum supply current without serial bus activity of the wiper. When powered on, the wiper of each DCP will (standby) always commence at mid-scale (128 tap position). - 3A V and V = 5V CC LOGIC The low voltage, low power consumption, and small package - 1.7A V and V = 1.7V CC LOGIC of the ISL23325 make it an ideal choice for use in battery Shutdown Mode operated equipment. In addition, the ISL23325 has a V LOGIC - Forces the DCP into an end-to-end open circuit and RWi is pin allowing down to 1.2V bus operation, independent from the connected to RLi internally V value. This allows for low logic levels to be connected CC - Reduces power consumption by disconnecting the DCP directly to the ISL23325 without passing through a voltage resistor from the circuit level shifter. Power supply The DCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications -V = 1.7V to 5.5V analog power supply CC 2 including control, parameter adjustments, and signal -V = 1.2V to 5.5V I C bus/logic power supply LOGIC processing. Wiper resistance: 70 typical V = 3.3V CC Applications Power-on preset to mid-scale (128 tap position) Power supply margining Extended industrial temperature range: -40C to +125C Trimming sensor circuits 14 Ld TSSOP or 16 Ld TQFN packages Gain adjustment in battery powered instruments Pb-free (RoHS Compliant) RF power amplifier bias compensation 10000 V REF 8000 RH1 6000 - V REF M 1 DCP RW1 4000 OF + ISL23325 ISL28114 2000 RL1 0 0 64 128 192 256 TAP POSITION (DECIMAL) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP FIGURE 2. V ADJUSTMENT REF POSITION, 10k DCP FN7870 Rev 1.00 Page 1 of 20 September 23, 2015 RESISTANCE ()ISL23325 Block Diagram V V RH0 RH1 LOGIC CC SCL POWER UP SDA INTERFACE, LEVEL I/O CONTROL WR0 A0 SHIFTER WR1 BLOCK AND VOLATILE VOLATILE A1 STATUS REGISTER REGISTER LOGIC A2 AND AND WIPER WIPER CONTROL CONTROL CIRCUITRY CIRCUITRY GND RW0 RL0 RW1 RL1 Pin Configurations Pin Descriptions ISL23325 (14 LD TSSOP) TSSOP TQFN SYMBOL DESCRIPTION TOP VIEW 1 6, 15 GND Ground pin 2 216 V I C bus/logic supply. Range 1.2V to GND 1 14 V LOGIC CC 5.5V V 2 13 RL0 LOGIC 3 1 SDA Logic Pin - Serial bus data SDA 3 12 RW0 input/open drain output SCL 4 11 RH0 4 2 SCL Logic Pin - Serial bus clock input A0 5 10 RH1 5 3 A0 Logic Pin - Hardwire slave address 2 pin for I C serial bus. A1 6 9 RW1 Range: V or GND LOGIC 8 A2 7 RL1 6 4 A1 Logic Pin - Hardwire slave address 2 pin for I C serial bus. Range: V or GND LOGIC ISL23325 (16 LD TQFN) 7 5 A2 Logic Pin - Hardwire slave address 2 TOP VIEW pin for I C serial bus. Range: V or GND LOGIC 8 8 RL1 DCP1 low terminal 9 9 RW1 DCP1 wiper terminal SDA 1 12 RW0 10 10 RH1 DCP1 high terminal SCL 2 11 RH0 11 11 RH0 DCP0 high terminal A0 3 10 RH1 12 12 RW0 DCP0 wiper terminal A1 4 9 RW1 13 13 RL0 DCP0 low terminal 14 14 V Analog power supply. CC Range 1.7V to 5.5V 7NC Not Connected FN7870 Rev 1.00 Page 2 of 20 September 23, 2015 A2 5 16 V LOGIC GND 6 15 GND NC 7 14 V CC RL1 8 13 RL0